HD64F2676VFC33 Renesas Electronics America, HD64F2676VFC33 Datasheet - Page 798

• Manufacturer Part Number: HD64F2676VFC33
• Description: IC H8S MCU FLASH 256K 144-QFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8S/2600r

Specifications of HD64F2676VFC33

• Core Processor: H8S/2600
• Core Size: 16-Bit
• Speed: 33MHz
• Connectivity: IrDA, SCI
• Peripherals: DMA, POR, PWM, WDT
• Number Of I /o: 103
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 12x10b; D/A 4x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 144-QFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -

Section 16 A/D Converter
16.3.2
ADCSR controls A/D conversion operations.
Bit
7
6
5
4
Rev. 3.00 Mar 17, 2006 page 746 of 926
REJ09B0283-0300
H8S/2678 Group
Bit Name
ADF
ADIE
ADST
SCAN
A/D Control/Status Register (ADCSR)
Initial Value
0
0
0
0
R/W
R/(W) *
R/W
R/W
R/W
Description
A/D End Flag
A status flag that indicates the end of A/D
conversion.
[Setting conditions]
[Clearing conditions]
A/D Interrupt Enable
A/D conversion end interrupt (ADI) request
enabled when 1 is set
A/D Start
Clearing this bit to 0 stops A/D conversion, and
the A/D converter enters wait state. When this bit
is set to 1 by software, TPU (trigger), TMR
(trigger), or the ADTRG pin, A/D conversion
starts. This bit remains set to 1 during A/D
conversion. In single mode, cleared to 0
automatically when conversion on the specified
channel ends. In scan mode, conversion
continues sequentially on the specified channels
until this bit is cleared to 0 by a reset, or a
transition to hardware standby mode or software.
Scan Mode
Selects single mode or scan mode as the A/D
conversion operating mode.
0: Single mode
1: Scan mode
When A/D conversion ends in single mode
When A/D conversion ends on all specified
channels in scan mode
When 0 is written after reading ADF = 1
When the DTC or DMAC is activated by an
ADI interrupt and ADDR is read