HD64F2676VFC33 Renesas Electronics America, HD64F2676VFC33 Datasheet - Page 131

IC H8S MCU FLASH 256K 144-QFP

HD64F2676VFC33

Manufacturer Part Number
HD64F2676VFC33
Description
IC H8S MCU FLASH 256K 144-QFP
Manufacturer
Renesas Electronics America
Series
H8® H8S/2600r
Datasheets

Specifications of HD64F2676VFC33

Core Processor
H8S/2600
Core Size
16-Bit
Speed
33MHz
Connectivity
IrDA, SCI
Peripherals
DMA, POR, PWM, WDT
Number Of I /o
103
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 12x10b; D/A 4x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
144-QFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-

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4.3.2
If an interrupt is accepted after a reset but before the stack pointer (SP) is initialized, the PC and
CCR will not be saved correctly, leading to a program crash. To prevent this, all interrupt requests,
including NMI, are disabled immediately after a reset. Since the first instruction of a program is
always executed immediately after the reset state ends, make sure that this instruction initializes
the stack pointer (example: MOV.L #xx: 32, SP).
4.3.3
After reset release, MSTPCR is initialized to H'0FFF and all modules except the DMAC,
EXDMAC and the DTC enter module stop mode.
Figure 4.2 Reset Sequence (Advanced Mode with On-Chip ROM Disabled)
(1)(3) Reset exception handling vector address (when reset, (1)=H'000000, (3)=H'000002)
(2)(4) Start address (contents of reset exception handling vector address)
(5) Start address ((5)=(2)(4))
(6) First program instruction
Note: * Seven program wait states are inserted.
RES
RD
HWR, LWR
D15 to D0
Address bus
φ
Interrupts after Reset
On-Chip Peripheral Functions after Reset Release
(1)
*
Vector fetch
(2)
High
*
Rev. 3.00 Mar 17, 2006 page 79 of 926
(3)
(4)
Internal
processing
Section 4 Exception Handling
Prefetch of first
program instruction
*
(5)
REJ09B0283-0300
(6)

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