HD64F2676VFC33 Renesas Electronics America, HD64F2676VFC33 Datasheet - Page 434

• Manufacturer Part Number: HD64F2676VFC33
• Description: IC H8S MCU FLASH 256K 144-QFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8S/2600r

Specifications of HD64F2676VFC33

• Core Processor: H8S/2600
• Core Size: 16-Bit
• Speed: 33MHz
• Connectivity: IrDA, SCI
• Peripherals: DMA, POR, PWM, WDT
• Number Of I /o: 103
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 12x10b; D/A 4x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 144-QFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -

Section 8 EXDMA Controller
Auto Request/Burst Mode/Normal Transfer Mode: When the EDA bit is set to 1 in EDMDR,
an EXDMA transfer cycle is started a minimum of three cycles later. Once transfer is started, it
continues (as a burst) until the transfer end condition is satisfied.
If the BGUP bit is 1 in EDMDR, the bus is transferred in the event of a bus request from another
bus master.
Transfer requests for other channels are held pending until the end of transfer on the current
channel.
Figures 8.31 to 8.34 show operation timing examples for various conditions.
Rev. 3.00 Mar 17, 2006 page 382 of 926
REJ09B0283-0300
Bus cycle
CPU
operation
ETEND
EDA bit
Bus cycle
CPU
operation
pin
pin
CPU cycle CPU cycle
CPU cycle CPU cycle
External
External
1
space
space
Figure 8.31 Auto Request/Burst Mode/Normal Transfer Mode
Figure 8.32 Auto Request/Burst Mode/Normal Transfer Mode
External
External
space
space
(CPU Cycles/Dual Address Mode/BGUP = 0)
(CPU Cycles/Dual Address Mode/BGUP = 1)
External
EXDMA
External
EXDMA
space
space
read
read
EXDMA
EXDMA
write
write
1 bus cycle
CPU cycle
EXDMA
read
External
EXDMA
EXDMA
space
write
read
Repeated
EXDMA
write
1 bus cycle
CPU cycle
Last transfer cycle
EXDMA
read
EXDMA
EXDMA
write
read
CPU cycle
EXDMA
0
write