HD64F2676VFC33 Renesas Electronics America, HD64F2676VFC33 Datasheet - Page 615

• Manufacturer Part Number: HD64F2676VFC33
• Description: IC H8S MCU FLASH 256K 144-QFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8S/2600r

Specifications of HD64F2676VFC33

• Core Processor: H8S/2600
• Core Size: 16-Bit
• Speed: 33MHz
• Connectivity: IrDA, SCI
• Peripherals: DMA, POR, PWM, WDT
• Number Of I /o: 103
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 12x10b; D/A 4x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 144-QFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -

Input Capture Function: The TCNT value can be transferred to TGR on detection of the TIOC
pin input edge.
Rising edge, falling edge, or both edges can be selected as the detection edge. For channels 0, 1, 3,
and 4, it is also possible to specify another channel’s counter input clock or compare match signal
as the input capture source.
Note: When another channel’s counter input clock is used as the input capture input for channels
1. Example of setting procedure for input capture operation
Figure 11.8 shows an example of the setting procedure for input capture operation.
<Input capture operation>
Select input capture input
0 and 3, /1 should not be selected as the counter input clock used for input capture input.
Input capture will not be generated if /1 is selected.
Figure 11.8 Example of Setting Procedure for Input Capture Operation
Input selection
Start count
[1]
[2]
[1] Designate TGR as an input capture register by
[2] Set the CST bit in TSTR to 1 to start the count
means of TIOR, and select the input capture
source and input signal edge (rising edge, falling
edge, or both edges).
operation.
Section 11 16-Bit Timer Pulse Unit (TPU)
Rev. 3.00 Mar 17, 2006 page 563 of 926
REJ09B0283-0300