HD64F2676VFC33 Renesas Electronics America, HD64F2676VFC33 Datasheet - Page 507

IC H8S MCU FLASH 256K 144-QFP

HD64F2676VFC33

Manufacturer Part Number
HD64F2676VFC33
Description
IC H8S MCU FLASH 256K 144-QFP
Manufacturer
Renesas Electronics America
Series
H8® H8S/2600r
Datasheets

Specifications of HD64F2676VFC33

Core Processor
H8S/2600
Core Size
16-Bit
Speed
33MHz
Connectivity
IrDA, SCI
Peripherals
DMA, POR, PWM, WDT
Number Of I /o
103
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 12x10b; D/A 4x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
144-QFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-

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10.3.2
P3DR stores output data for the port 3 pins.
10.3.3
PORT3 shows the pin states.
PORT3 cannot be modified.
Note:
Bit
7, 6
5
4
3
2
1
0
Bit
7, 6
5
4
3
2
1
0
Bit Name
P35DR
P34DR
P33DR
P32DR
P31DR
P30DR
Bit Name
P35
P34
P33
P32
P31
P30
* Determined by the states of pins P35 to P30.
Port 3 Data Register (P3DR)
Port 3 Register (PORT3)
Initial Value
All 0
0
0
0
0
0
0
Initial Value
All 0
Undefined *
Undefined *
Undefined *
Undefined *
Undefined *
Undefined *
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R
R
R
R
R
R
Description
Reserved
These bits are always read as 0 and cannot be
modified.
Output data for a pin is stored when the pin function
is specified to a general purpose I/O.
Description
Reserved
These bits are always read as 0 and cannot be
modified.
If a port 3 read is performed while P3DDR bits are
set to 1, the P3DR values are read. If a port 1 read
is performed while P3DDR bits are cleared to 0, the
pin states are read.
Rev. 3.00 Mar 17, 2006 page 455 of 926
Section 10 I/O Ports
REJ09B0283-0300

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