MCF5307AI90B Freescale Semiconductor, MCF5307AI90B Datasheet - Page 335

IC MPU 32BIT COLDF 90MHZ 208FQFP

MCF5307AI90B

Manufacturer Part Number
MCF5307AI90B
Description
IC MPU 32BIT COLDF 90MHZ 208FQFP
Manufacturer
Freescale Semiconductor
Series
MCF530xr
Datasheets

Specifications of MCF5307AI90B

Core Processor
Coldfire V3
Core Size
32-Bit
Speed
90MHz
Connectivity
EBI/EMI, I²C, UART/USART
Peripherals
DMA, POR, WDT
Number Of I /o
16
Program Memory Type
ROMless
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Oscillator Type
External
Operating Temperature
0°C ~ 70°C
Package / Case
208-FQFP
Maximum Clock Frequency
90 MHz
Maximum Operating Temperature
+ 105 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
0 C
Family Name
MCF5xxx
Device Core
ColdFire
Device Core Size
32b
Frequency (max)
90MHz
Instruction Set Architecture
RISC
Supply Voltage 1 (typ)
3.3V
Operating Temp Range
0C to 70C
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Pin Count
208
Package Type
FQFP
Program Memory Size
8KB
Cpu Speed
90MHz
Embedded Interface Type
I2C, UART
Digital Ic Case Style
FQFP
No. Of Pins
208
Supply Voltage Range
3V To 3.6V
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-
Data Converters
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

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Company
Part Number
Manufacturer
Quantity
Price
Part Number:
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MCF5307AI90B
Manufacturer:
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Quantity:
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Part Number:
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Manufacturer:
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available; therefore, overrun errors can be prevented by connecting RTS to the CTS input
of the transmitting device.
14.5.3 Looping Modes
The UART can be configured to operate in various looping modes as shown in Figure 14-22
on page 14-23. These modes are useful for local and remote system diagnostic functions.
The modes are described in the following paragraphs and in Section 14.3, “Register
Descriptions.”
The UART’s transmitter and receiver should be disabled when switching between modes.
The selected mode is activated immediately upon mode selection, regardless of whether a
character is being received or transmitted.
14.5.3.1 Automatic Echo Mode
In automatic echo mode, shown in Figure 14-23, the UART automatically resends received
data bit by bit. The local CPU-to-receiver communication continues normally, but the
CPU-to-transmitter link is disabled. In this mode, received data is clocked on the receiver
clock and resent on TxD. The receiver must be enabled, but the transmitter need not be.
Because the transmitter is inactive, USRn[TxEMP,TxRDY] are inactive and data is sent as
it is received. Received parity is checked but is not recalculated for transmission. Character
framing is also checked, but stop bits are sent as they are received. A received break is
echoed as received until the next valid start bit is detected.
14.5.3.2 Local Loop-Back Mode
Figure 14-24 shows how TxD and RxD are internally connected in local loop-back mode.
This mode is for testing the operation of a local UART module channel by sending data to
the transmitter and checking data assembled by the receiver to ensure proper operations.
The receiver can still read characters in the FIFO stack if the
receiver is disabled. If the receiver is reset, the FIFO stack, RTS
control, all receiver status bits, and interrupt requests are reset.
No more characters are received until the receiver is reenabled.
CPU
Freescale Semiconductor, Inc.
For More Information On This Product,
Disabled
Figure 14-23. Automatic Echo
Chapter 14. UART Modules
Go to: www.freescale.com
Rx
Tx
NOTE:
Disabled
RxD Input
TxD Input
Operation
14-25

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