MCF5307AI90B Freescale Semiconductor, MCF5307AI90B Datasheet - Page 266

• Manufacturer Part Number: MCF5307AI90B
• Description: IC MPU 32BIT COLDF 90MHZ 208FQFP
• Manufacturer: Freescale Semiconductor
• Series: MCF530xr

Specifications of MCF5307AI90B

• Core Processor: Coldfire V3
• Core Size: 32-Bit
• Speed: 90MHz
• Connectivity: EBI/EMI, I²C, UART/USART
• Peripherals: DMA, POR, WDT
• Number Of I /o: 16
• Program Memory Type: ROMless
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Oscillator Type: External
• Operating Temperature: 0°C ~ 70°C
• Package / Case: 208-FQFP
• Maximum Clock Frequency: 90 MHz
• Maximum Operating Temperature: + 105 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: 0 C
• Family Name: MCF5xxx
• Device Core: ColdFire
• Device Core Size: 32b
• Frequency (max): 90MHz
• Instruction Set Architecture: RISC
• Supply Voltage 1 (typ): 3.3V
• Operating Temp Range: 0C to 70C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Pin Count: 208
• Package Type: FQFP
• Program Memory Size: 8KB
• Cpu Speed: 90MHz
• Embedded Interface Type: I2C, UART
• Digital Ic Case Style: FQFP
• No. Of Pins: 208
• Supply Voltage Range: 3V To 3.6V
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -
• Data Converters: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

Synchronous Operation
11.4.4.6 Self-Refresh Operation
Self-refresh is a method of allowing the SDRAM to enter into a low-power state, while at
the same time to perform an internal refresh operation and to maintain the integrity of the
data stored in the SDRAM. The DRAM controller supports self-refresh with DCR[IS].
When IS is set, the
command is sent to the DRAM controller. Figure 11-23 shows the self-refresh operation.
(DCR[COC] = 0)
11-32
RAS[0] or [1]
RAS[0] or [1]
DRAMW
BCLKO
A[31:0]
DRAMW
BCLKO
SRAS
SCAS
SRAS
SCAS
SCKE
PALL
PALL
SELF
t
t
RCD
NOP
RCD
Freescale Semiconductor, Inc.
NOP
= 2
Figure 11-22. Auto-Refresh Operation
= 2
Figure 11-23. Self-Refresh Operation
command is sent to the SDRAM. When IS is cleared, the
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MCF5307 User’s Manual
Active
Self-
SELFX
t
RC
NOP
t
RC
= 6
= 6
NOP
Possible
ACTV
ACTV
First
SELFX