DF2148ATE20 Renesas Electronics America, DF2148ATE20 Datasheet - Page 456

• Manufacturer Part Number: DF2148ATE20
• Description: IC H8S MCU FLASH 128K 100-QFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8S/2100r

Specifications of DF2148ATE20

• Core Processor: H8S/2000
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: Host Interface, I²C, IrDA, SCI
• Peripherals: POR, PWM, WDT
• Number Of I /o: 74
• Program Memory Size: 128KB (128K x 8)
• Program Memory Type: FLASH
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 4 V ~ 5.5 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 100-TQFP, 100-VQFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Other names: HD64F2148ATE20; HD64F2148ATE20

Section 14 Watchdog Timer (WDT)
14.1.4
The WDT has four registers, as summarized in table 14.2. These registers control clock selection,
WDT mode switching, the reset signal, etc.
Table 14.2 WDT Registers
Channel
0
1
Common
Notes: 1. Lower 16 bits of the address.
14.2
14.2.1
TCNT is an 8-bit readable/writable * up-counter.
When the TME bit is set to 1 in TCSR, TCNT starts counting pulses generated from the internal
clock source selected by bits CKS2 to CKS0 in TCSR. When the count overflows (changes from
H'FF to H'00), the OVF flag in TCSR is set to 1. Watchdog timer overflow signal (RESO) output,
an internal reset, NMI interrupt, interval timer interrupt (WOVI), etc., can be generated, depending
on the mode selected by the WT/IT bit and RST/NMI bit.
Rev. 4.00 Sep 27, 2006 page 410 of 1130
REJ09B0327-0400
Bit
Initial value
Read/Write
2. For details of write operations, see section 14.2.4, Notes on Register Access.
3. Only 0 can be written in bit 7, to clear the flag.
Register Configuration
Register Descriptions
Timer Counter (TCNT)
Name
Timer control/status
register 0
Timer counter 0
Timer control/status
register 1
Timer counter 1
System control
register
R/W
7
0
R/W
6
0
Abbreviation R/W
TCSR0
TCNT0
TCSR1
TCNT1
SYSCR
R/W
5
0
R/W
4
0
R/(W) *
R/W
R/(W) *
R/W
R/W
3
3
R/W
3
0
Initial Value
H'00
H'00
H'00
H'00
H'09
R/W
2
0
Write *
H'FFA8
H'FFA8
H'FFEA
H'FFEA
H'FFC4
R/W
1
0
Address *
2
Read
H'FFA8
H'FFA9
H'FFEA
H'FFEB
H'FFC4
R/W
0
0
1