DF2148ATE20 Renesas Electronics America, DF2148ATE20 Datasheet - Page 1119

• Manufacturer Part Number: DF2148ATE20
• Description: IC H8S MCU FLASH 128K 100-QFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8S/2100r

Specifications of DF2148ATE20

• Core Processor: H8S/2000
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: Host Interface, I²C, IrDA, SCI
• Peripherals: POR, PWM, WDT
• Number Of I /o: 74
• Program Memory Size: 128KB (128K x 8)
• Program Memory Type: FLASH
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 4 V ~ 5.5 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 100-TQFP, 100-VQFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Other names: HD64F2148ATE20; HD64F2148ATE20

TCSR1—Timer Control/Status Register 1
Notes: 1.
Bit
Initial value
Read/Write
2.
Only 0 can be written, to clear the flag.
For operation control when a transition is made to power-down mode, see section 25.2.3, Timer Control/Status Register (TCSR).
R/(W) *
Overflow flag
Note: * When OVF is polled and the interval timer interrupt is disabled,
0
1
OVF
7
0
[Clearing conditions]
• Write 0 in the TME bit
• Read TCSR when OVF = 1 * , then write 0 in OVF
[Setting condition]
When TCNT overflows (changes from H'FF to H'00)
(When internal reset request generation is selected in watchdog
timer mode, OVF is cleared automatically by the internal reset.)
OVF = 1 must be read at least twice.
1
WT/IT
Timer mode select
R/W
0
1
6
0
Interval timer mode: Interval timer interrupt request (WOVI)
sent to CPU when TCNT overflows
Watchdog timer mode: Reset or NMI interrupt request sent
to CPU when TCNT overflows
TME
Timer enable
R/W
0
1
5
0
TCNT is initialized to H'00 and halted
TCNT counts
Prescaler select *
PSS
R/W
0
1
4
0
TCNT counts on a ø-based prescaler (PSM) scaled clock
TCNT counts on a øSUB-based prescaler (PSS) scaled clock
RST/NMI
Rev. 4.00 Sep 27, 2006 page 1073 of 1130
Reset or NMI
R/W
0
1
H'FFEA
2
3
0
NMI interrupt requested
Internal reset requested
Appendix B Internal I/O Registers
CKS2
R/W
2
0
Clock select 2 to 0
PSS
0
1
CKS2
CKS1
0
1
0
1
R/W
1
0
CKS1
0
1
0
1
0
1
0
1
REJ09B0327-0400
CKS0
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
CKS0
R/W
0
0
/2
/64
/128
/512
/2048
/8192
/32768
/131072
SUB/2
SUB/4
SUB/8
SUB/16
SUB/32
SUB/64
SUB/128
SUB/256
Clock
WDT1