DF2148ATE20 Renesas Electronics America, DF2148ATE20 Datasheet - Page 36

• Manufacturer Part Number: DF2148ATE20
• Description: IC H8S MCU FLASH 128K 100-QFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8S/2100r

Specifications of DF2148ATE20

• Core Processor: H8S/2000
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: Host Interface, I²C, IrDA, SCI
• Peripherals: POR, PWM, WDT
• Number Of I /o: 74
• Program Memory Size: 128KB (128K x 8)
• Program Memory Type: FLASH
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 4 V ~ 5.5 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 100-TQFP, 100-VQFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Other names: HD64F2148ATE20; HD64F2148ATE20

14.2 Register Descriptions ........................................................................................................ 410
14.3 Operation .......................................................................................................................... 416
14.4 Interrupts ........................................................................................................................... 419
14.5 Usage Notes ...................................................................................................................... 420
Section 15 Serial Communication Interface (SCI, IrDA)
15.1 Overview........................................................................................................................... 423
15.2 Register Descriptions ........................................................................................................ 428
Rev. 4.00 Sep 27, 2006 page xxxiv of xliv
14.1.2 Block Diagram ..................................................................................................... 408
14.1.3 Pin Configuration................................................................................................. 409
14.1.4 Register Configuration......................................................................................... 410
14.2.1 Timer Counter (TCNT)........................................................................................ 410
14.2.2 Timer Control/Status Register (TCSR) ................................................................ 411
14.2.3 System Control Register (SYSCR) ...................................................................... 414
14.2.4 Notes on Register Access..................................................................................... 415
14.3.1 Watchdog Timer Operation ................................................................................. 416
14.3.2 Interval Timer Operation ..................................................................................... 417
14.3.3 Timing of Setting of Overflow Flag (OVF) ......................................................... 418
14.3.4 RESO Signal Output Timing ............................................................................... 419
14.5.1 Contention between Timer Counter (TCNT) Write and Increment ..................... 420
14.5.2 Changing Value of CKS2 to CKS0...................................................................... 420
14.5.3 Switching between Watchdog Timer Mode and Interval Timer Mode................ 421
14.5.4 System Reset by RESO Signal............................................................................. 421
14.5.5 Counter Value in Transitions between High-Speed Mode, Subactive Mode,
14.5.6 OVF Flag Clear Condition................................................................................... 422
15.1.1 Features................................................................................................................ 423
15.1.2 Block Diagram ..................................................................................................... 425
15.1.3 Pin Configuration................................................................................................. 426
15.1.4 Register Configuration......................................................................................... 426
15.2.1 Receive Shift Register (RSR) .............................................................................. 428
15.2.2 Receive Data Register (RDR) .............................................................................. 428
15.2.3 Transmit Shift Register (TSR) ............................................................................. 429
15.2.4 Transmit Data Register (TDR)............................................................................. 429
15.2.5 Serial Mode Register (SMR)................................................................................ 430
15.2.6 Serial Control Register (SCR).............................................................................. 433
15.2.7 Serial Status Register (SSR) ................................................................................ 436
15.2.8 Bit Rate Register (BRR) ...................................................................................... 441
15.2.9 Serial Interface Mode Register (SCMR).............................................................. 449
15.2.10 Module Stop Control Register (MSTPCR) .......................................................... 450
15.2.11 Keyboard Comparator Control Register (KBCOMP) .......................................... 452
and Watch Mode.................................................................................................. 421
........................................ 423