DF2148ATE20 Renesas Electronics America, DF2148ATE20 Datasheet - Page 1028

• Manufacturer Part Number: DF2148ATE20
• Description: IC H8S MCU FLASH 128K 100-QFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8S/2100r

Specifications of DF2148ATE20

• Core Processor: H8S/2000
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: Host Interface, I²C, IrDA, SCI
• Peripherals: POR, PWM, WDT
• Number Of I /o: 74
• Program Memory Size: 128KB (128K x 8)
• Program Memory Type: FLASH
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 4 V ~ 5.5 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 100-TQFP, 100-VQFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Other names: HD64F2148ATE20; HD64F2148ATE20

Appendix A Instruction Set
CMP.B #xx:8,Rd
CMP.B Rs,Rd
CMP.W #xx:16,Rd
CMP.W Rs,Rd
CMP.L #xx:32,ERd R:W 2nd
CMP.L ERs,ERd
DAA Rd
DAS Rd
DEC.B Rd
DEC.W #1/2,Rd
DEC.L #1/2,ERd
DIVXS.B Rs,Rd
DIVXS.W Rs,ERd
DIVXU.B Rs,Rd
DIVXU.W Rs,ERd
EEPMOV.B
EEPMOV.W
EXTS.W Rd
EXTS.L ERd
EXTU.W Rd
EXTU.L ERd
INC.B Rd
INC.W #1/2,Rd
INC.L #1/2,ERd
JMP @ERn
JMP @aa:24
JMP
@@aa:8
JSR
@ERn
JSR
@aa:24
JSR
@@aa:8
Rev. 4.00 Sep 27, 2006 page 982 of 1130
REJ09B0327-0400
Instruction
Advanced R:W NEXT R:W:M
Advanced R:W NEXT R:W EA
Advanced R:W 2nd
Advanced R:W NEXT R:W:M
R:W NEXT
R:W NEXT
R:W 2nd
R:W NEXT
R:W NEXT
R:W NEXT
R:W NEXT
R:W NEXT
R:W NEXT
R:W NEXT
R:W 2nd
R:W 2nd
R:W NEXT Internal operation, 11 states
R:W NEXT Internal operation, 19 states
R:W 2nd
R:W 2nd
R:W NEXT
R:W NEXT
R:W NEXT
R:W NEXT
R:W NEXT
R:W NEXT
R:W NEXT
R:W NEXT R:W EA
R:W 2nd
1
R:W NEXT
R:W 3rd
R:W NEXT Internal operation, 11 states
R:W NEXT Internal operation, 19 states
R:B EAs *
R:B EAs *
Internal
operation,
1 state
aa:8
Internal
operation,
1 state
aa:8
2
1
1
R:W NEXT
R:B EAd *
R:B EAd *
R:W EA
R:W aa:8
W:W:M
Stack (H)
R:W EA
R:W aa:8
3
1
1
R:B EAs *
R:B EAs *
Internal
operation,
1 state
W:W
Stack (L)
W:W:M
Stack (H)
W:W:M
Stack (H)
Repeated n times *
4
2
2
W:B EAd *
W:B EAd *
R:W EA
W:W
Stack (L)
W:W
Stack (L)
5
2
2
2
R:W NEXT
R:W NEXT
R:W EA
6
7
8
9