DF2148ATE20 Renesas Electronics America, DF2148ATE20 Datasheet - Page 431

IC H8S MCU FLASH 128K 100-QFP

DF2148ATE20

Manufacturer Part Number
DF2148ATE20
Description
IC H8S MCU FLASH 128K 100-QFP
Manufacturer
Renesas Electronics America
Series
H8® H8S/2100r
Datasheets

Specifications of DF2148ATE20

Core Processor
H8S/2000
Core Size
16-Bit
Speed
20MHz
Connectivity
Host Interface, I²C, IrDA, SCI
Peripherals
POR, PWM, WDT
Number Of I /o
74
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
4 V ~ 5.5 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
100-TQFP, 100-VQFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Other names
HD64F2148ATE20
HD64F2148ATE20

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Company
Part Number
Manufacturer
Quantity
Price
Part Number:
DF2148ATE20IV
Manufacturer:
Renesas Electronics America
Quantity:
135
Part Number:
DF2148ATE20IV
Manufacturer:
Renesas Electronics America
Quantity:
10 000
13.2.3
TCONRS is an 8-bit readable/writable register that selects 8-bit timer TMRX/TMRY access and
the synchronization signal output signal source and generation method.
TCONRS is initialized to H'00 by a reset and in hardware standby mode.
Bit 7—TMRX/TMRY Access Select (TMRX/Y): The TMRX and TMRY registers can only be
accessed when the HIE bit in SYSCR is cleared to 0. In the H8S/2148 Group, some of the TMRX
registers and the TMRY registers are assigned to the same memory space addresses (H'FFF0 to
H'FFF5), and the TMRX/Y bit determines which registers are accessed. In the H8S/2144 Group
and H8S/2147N, there is no control of TMRY register access by this bit.
Bit 6—Internal Synchronization Signal Select (ISGENE): Selects internal synchronization
signals (IHG, IVG, and CL4 signals) as the signal sources for the IHO, IVO, and CLO signals.
Bit 0
CBOINV
0
1
Bit 7
TMRX/Y
0
1
Bit
Initial value
Read/Write
Timer Connection Register S (TCONRS)
Description
The CBLANK signal is used directly as the CBLANK output
The CBLANK signal is inverted before use as the CBLANK output
Description
The TMRX registers are accessed at addresses H'FFF0 to H'FFF5
The TMRY registers are accessed at addresses H'FFF0 to H'FFF5
TMRX/Y
R/W
7
0
ISGENE
R/W
6
0
HOMOD1
R/W
5
0
HOMOD0
R/W
4
0
Rev. 4.00 Sep 27, 2006 page 385 of 1130
VOMOD1
R/W
3
0
VOMOD0
Section 13 Timer Connection
R/W
2
0
CLMOD1
R/W
REJ09B0327-0400
1
0
(Initial value)
(Initial value)
CLMOD0
R/W
0
0

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