DF2148ATE20 Renesas Electronics America, DF2148ATE20 Datasheet - Page 225

IC H8S MCU FLASH 128K 100-QFP

DF2148ATE20

Manufacturer Part Number
DF2148ATE20
Description
IC H8S MCU FLASH 128K 100-QFP
Manufacturer
Renesas Electronics America
Series
H8® H8S/2100r
Datasheets

Specifications of DF2148ATE20

Core Processor
H8S/2000
Core Size
16-Bit
Speed
20MHz
Connectivity
Host Interface, I²C, IrDA, SCI
Peripherals
POR, PWM, WDT
Number Of I /o
74
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
4 V ~ 5.5 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
100-TQFP, 100-VQFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Other names
HD64F2148ATE20
HD64F2148ATE20

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
DF2148ATE20IV
Manufacturer:
Renesas Electronics America
Quantity:
135
Part Number:
DF2148ATE20IV
Manufacturer:
Renesas Electronics America
Quantity:
10 000
Provided in the H8S/2148 Group; not provided in the H8S/2144 Group and H8S/2147N.
7.1
The H8S/2148 Group includes a data transfer controller (DTC). The DTC can be activated by an
interrupt or software, to transfer data.
7.1.1
Transfer possible over any number of channels
Wide range of transfer modes
Direct specification of 16-Mbyte address space possible
Transfer can be set in byte or word units
A CPU interrupt can be requested for the interrupt that activated the DTC
Activation by software is possible
Module stop mode can be set
Transfer information is stored in memory
One activation source can trigger a number of data transfers (chain transfer)
Normal, repeat, and block transfer modes available
Incrementing, decrementing, and fixing of transfer source and destination addresses can be
selected
24-bit transfer source and destination addresses can be specified
An interrupt request can be issued to the CPU after one data transfer ends
An interrupt request can be issued to the CPU after all specified data transfers have ended
The initial setting enables DTC registers to be accessed. DTC operation is halted by setting
module stop mode
Features
Overview
Section 7 Data Transfer Controller (DTC)
Rev. 4.00 Sep 27, 2006 page 179 of 1130
Section 7 Data Transfer Controller (DTC)
REJ09B0327-0400

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