DF2148ATE20 Renesas Electronics America, DF2148ATE20 Datasheet - Page 344

• Manufacturer Part Number: DF2148ATE20
• Description: IC H8S MCU FLASH 128K 100-QFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8S/2100r

Specifications of DF2148ATE20

• Core Processor: H8S/2000
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: Host Interface, I²C, IrDA, SCI
• Peripherals: POR, PWM, WDT
• Number Of I /o: 74
• Program Memory Size: 128KB (128K x 8)
• Program Memory Type: FLASH
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 4 V ~ 5.5 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 100-TQFP, 100-VQFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Other names: HD64F2148ATE20; HD64F2148ATE20

Section 10 14-Bit PWM Timer (PWMX)
Bit 0—Clock Select (CKS): Selects the PWM (D/A) resolution. If the system clock ( ) frequency
is 10 MHz, resolutions of 100 ns and 200 ns can be selected.
Bit 0
CKS
0
1
10.2.4
MSTPCR comprises two 8-bit readable/writable registers, and is used to perform module stop
mode control.
When the MSTP11 bit is set to 1, 14-bit PWM timer operation is halted and a transition is made to
module stop mode. For details, see section 25.5, Module Stop Mode.
MSTPCR is initialized to H'3FFF by a reset and in hardware standby mode. It is not initialized in
software standby mode.
MSTPCRH Bit 3—Module Stop (MSTP11): Specifies PWMX module stop mode.
MSTPCRH
Bit 3
MSTP11
0
1
Rev. 4.00 Sep 27, 2006 page 298 of 1130
REJ09B0327-0400
Bit
Initial value
Read/Write
Module Stop Control Register (MSTPCR)
Description
Operates at resolution (T) = system clock cycle time (t
Operates at resolution (T) = system clock cycle time (t
Description
PWMX module stop mode is cleared
PWMX module stop mode is set
MSTP15
R/W
7
0
MSTP14
R/W
6
0
MSTP13
R/W
5
1
MSTPCRH
MSTP12
R/W
4
1
MSTP11
R/W
3
1
MSTP10
R/W
2
1
MSTP9
R/W
1
1
MSTP8
R/W
0
1
MSTP7
R/W
7
1
MSTP6
R/W
6
1
cyc
cyc
MSTP5
R/W
)
)
5
1
MSTPCRL
2
MSTP4
R/W
4
1
MSTP3
R/W
3
1
MSTP2
R/W
2
1
(Initial value)
(Initial value)
MSTP1
R/W
1
1
MSTP0
R/W
0
1