LM3S600-IQN20-A0T Bookham Technology, Inc., LM3S600-IQN20-A0T Datasheet - Page 8

• Manufacturer Part Number: LM3S600-IQN20-A0T
• Description: Microcontroller
• Manufacturer: Bookham Technology, Inc.

Table of Contents
Figure 13-13. Slave Command Sequence ............................................................................................ 302
Figure 14-1.
Figure 14-2.
Figure 14-3.
Figure 15-1.
Figure 18-1.
Figure 18-2.
Figure 18-3.
Figure 18-4.
Figure 18-5.
Figure 18-6.
Figure 18-7.
Figure 18-8.
Figure 18-9.
Figure 18-10. Power-On Reset Timing ................................................................................................. 356
Figure 18-11. Brown-Out Reset Timing ................................................................................................ 357
Figure 18-12. Software Reset Timing ................................................................................................... 357
Figure 18-13. Watchdog Reset Timing ................................................................................................. 357
Figure 18-14. LDO Reset Timing ......................................................................................................... 357
Figure 19-1.
8
Analog Comparator Module Block Diagram ..................................................................... 327
Structure of Comparator Unit .......................................................................................... 328
Comparator Internal Reference Structure ........................................................................ 329
Pin Connection Diagram ................................................................................................ 339
Load Conditions ............................................................................................................ 350
I
SSI Timing for TI Frame Format (FRF=01), Single Transfer Timing Measurement .............. 352
SSI Timing for MICROWIRE Frame Format (FRF=10), Single Transfer ............................. 353
SSI Timing for SPI Frame Format (FRF=00), with SPH=1 ................................................. 353
JTAG Test Clock Input Timing ......................................................................................... 354
JTAG Test Access Port (TAP) Timing .............................................................................. 355
JTAG TRST Timing ........................................................................................................ 355
External Reset Timing (RST) .......................................................................................... 356
48-Pin LQFP Package ................................................................................................... 358
2
C Timing ..................................................................................................................... 352
Preliminary
October 01, 2007