LM3S600-IQN20-A0T Bookham Technology, Inc., LM3S600-IQN20-A0T Datasheet - Page 123

• Manufacturer Part Number: LM3S600-IQN20-A0T
• Description: Microcontroller
• Manufacturer: Bookham Technology, Inc.

a. X=Ignored (don’t care bit)
?=Can be either 0 or 1, depending on the configuration
Table 8-2. GPIO Interrupt Configuration Example
a. X=Ignored (don’t care bit)
8.3
October 01, 2007
Configuration
Analog Input
(Comparator)
Digital Output
(Comparator)
Register
GPIOIS
GPIOIBE
GPIOIEV
GPIOIM
Desired
Interrupt
Event
Trigger
0=Low level,
1=High level,
or negative
0=masked
Register Map
Table 8-3 on page 124 lists the GPIO registers. The offset listed is a hexadecimal increment to the
register’s address, relative to that GPIO port’s base address:
■
■
■
■
■
Important:
or positive
0=single
masked
0=edge
1=level
1=both
edges
1=not
edge
edge
edge
GPIO Port A: 0x4000.4000
GPIO Port B: 0x4000.5000
GPIO Port C: 0x4000.6000
GPIO Port D: 0x4000.7000
GPIO Port E: 0x4002.4000
GPIO Register Bit Value
AFSEL
0
1
Pin 2 Bit Value
7
The GPIO registers in this chapter are duplicated in each GPIO block, however,
depending on the block, all eight bits may not be connected to a GPIO pad. In those
cases, writing to those unconnected bits has no effect and reading those unconnected
bits returns no meaningful data.
X
X
X
0
DIR
X
0
6
a
ODR
X
X
X
0
a
0
0
5
DEN
X
X
X
0
Preliminary
0
1
PUR
4
0
?
X
X
X
0
PDR
3
0
?
X
X
X
0
DR2R
X
?
2
0
0
1
1
DR4R
LM3S600 Microcontroller
X
?
1
DR8R
X
X
X
0
X
?
0
SLR
X
X
X
0
X
?
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