LM3S600-IQN20-A0T Bookham Technology, Inc., LM3S600-IQN20-A0T Datasheet - Page 351

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LM3S600-IQN20-A0T

Manufacturer Part Number
LM3S600-IQN20-A0T
Description
Microcontroller
Manufacturer
Bookham Technology, Inc.
Datasheet
18.2.3
18.2.4
October 01, 2007
Analog Comparator
Table 18-8. Analog Comparator Characteristics
Table 18-9. Analog Comparator Voltage Reference Characteristics
I
Table 18-10. I
a. Values depend on the value programmed into the TPR bit in the I
b. Because I2CSCL and I2CSDA are open-drain-type outputs, which the controller can only actively drive Low, the time
c. Specified at a nominal 50 pF load.
f
t
f
f
f
Parameter
Parameter
Parameter No.
2
MOSC
MOSC_per
ref_crystal_bypass
ref_ext_bypass
system_clock
C
Parameter
C
V
R
programmed for the maximum I2CSCL frequency (TPR=0x2) results in a minimum output timing as shown in the table
above. The I
period. The actual position is affected by the value programmed into the TPR; however, the numbers given in the above
values are minimum values.
I2CSCL or I2CSDA takes to reach a high level depends on external signal capacitance and pull-up resistor values.
V
T
R
A
T
A
MRR
CM
MC
OS
RT
HR
HR
LR
LR
I1
I2
I3
I4
I5
I6
I7
I8
I9
a
a
b
a
c
a
a
a
a
Parameter Name
Input offset voltage
Input common mode voltage range
Common mode rejection ratio
Response time
Comparator mode change to Output Valid
Parameter Name
Resolution high range
Resolution low range
Absolute accuracy high range
Absolute accuracy low range
Parameter Name
Main oscillator frequency
Main oscillator period
Crystal reference using the main oscillator (PLL in BYPASS mode)
External clock reference (PLL in BYPASS mode)
System clock
2
Parameter
2
C interface is designed to scale the actual data transition time to move it to the middle of the I2CSCL Low
C Characteristics
t
t
t
SCSR
t
t
SCH
t
t
t
t
SRT
SFT
SCS
DH
HT
DS
LP
Parameter Name
Start condition hold time
Clock Low period
I2CSCL/I2CSDA rise time (V
Data hold time
I2CSCL/I2CSDA fall time (V
Clock High time
Data setup time
Start condition setup time (for repeated start condition
only)
Stop condition setup time
Min
-
-
-
-
Preliminary
V
V
Nom
DD
DD
-
-
/32
/24
Min
50
0
Max
±1/2
±1/4
-
-
-
IH
IL
-
-
=2.4 V to V
=0.5 V to V
Nom
±10
Unit
LSB
LSB
LSB
LSB
-
-
-
-
2
V
C Master Timer Period (I2CMTPR) register; a TPR
DD
Max
±25
10
1
-
-1.5
IL
IH
=0.5 V)
=2.4 V)
Unit
mV
dB
µs
µs
V
Min
36
36
24
18
36
24
2
-
-
Min
125
1
1
0
0
Nom
9
Nom
-
-
-
-
-
-
-
-
LM3S600 Microcontroller
-
-
-
-
-
(see note b)
1000
Max
50
50
8
8
Max
10
-
-
-
-
-
-
-
MHz
MHz
MHz
MHz
Unit
ns
system clocks
system clocks
system clocks
system clocks
system clocks
system clocks
system clocks
Unit
ns
ns
351

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