LM3S600-IQN20-A0T Bookham Technology, Inc., LM3S600-IQN20-A0T Datasheet - Page 217

• Manufacturer Part Number: LM3S600-IQN20-A0T
• Description: Microcontroller
• Manufacturer: Bookham Technology, Inc.

11.1
11.2
11.2.1
October 01, 2007
Block Diagram
Figure 11-1. UART Module Block Diagram
Functional Description
Each Stellaris
It is similar in functionality to a 16C550 UART, but is not register compatible.
The UART is configured for transmit and/or receive via the TXE and RXE bits of the UART Control
(UARTCTL) register (see page 233). Transmit and receive are both enabled out of reset. Before any
control registers are programmed, the UART must be disabled by clearing the UARTEN bit in
UARTCTL. If the UART is disabled during a TX or RX operation, the current transaction is completed
prior to the UART stopping.
Transmit/Receive Logic
The transmit logic performs parallel-to-serial conversion on the data read from the transmit FIFO.
The control logic outputs the serial bit stream beginning with a start bit, and followed by the data
bits (LSB first), parity bit, and the stop bits according to the programmed configuration in the control
registers. See Figure 11-2 on page 218 for details.
System Clock
Interrupt
UART PeriphID4
UARTPeriphID0
UARTPeriphID1
UARTPeriphID2
UARTPeriphID3
UARTPeriphID5
UARTPeriphID6
UARTPeriphID7
UARTPCellID0
UARTPCellID1
UARTPCellID2
UARTPCellID3
Identification
Registers
®
UART performs the functions of parallel-to-serial and serial-to-parallel conversions.
Interrupt Control
Control / Status
UARTRSR/ECR
UARTLCRH
UARTIFLS
UARTILPR
UARTMIS
UARTICR
UARTDR
UARTCTL
UARTRIS
UARTFR
UARTIM
Preliminary
UARTFBRD
UARTIBRD
Baud Rate
Generator
TXFIFO
RXFIFO
16x8
16x8
.
.
.
.
.
.
LM3S600 Microcontroller
Transmitter
Receiver
UnRx
UnTx
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