LM3S600-IQN20-A0T Bookham Technology, Inc., LM3S600-IQN20-A0T Datasheet - Page 60
![no-image](/images/no-image-200.jpg)
LM3S600-IQN20-A0T
Manufacturer Part Number
LM3S600-IQN20-A0T
Description
Microcontroller
Manufacturer
Bookham Technology, Inc.
Datasheet
1.LM3S600-IQN20-A0T.pdf
(378 pages)
- Current page: 60 of 378
- Download datasheet (4Mb)
System Control
LDO Power Control (LDOPCTL)
Base 0x400F.E000
Offset 0x034
Type R/W, reset 0x0000.0000
60
Reset
Reset
Type
Type
Bit/Field
31:6
5:0
RO
RO
31
15
0
0
Register 3: LDO Power Control (LDOPCTL), offset 0x034
The VADJ field in this register adjusts the on-chip output voltage (V
RO
RO
30
14
0
0
reserved
Name
VADJ
RO
RO
29
13
0
0
RO
RO
28
12
0
0
RO
RO
Type
27
11
R/W
0
0
RO
reserved
RO
RO
26
10
0
0
Reset
0x0
0
RO
RO
25
0
9
0
Preliminary
Description
Software should not rely on the value of a reserved bit. To provide
compatibility with future products, the value of a reserved bit should be
preserved across a read-modify-write operation.
LDO Output Voltage
This field sets the on-chip output voltage. The programming values for
the VADJ field are provided below.
RO
RO
Value
0x00
0x01
0x02
0x03
0x04
0x05
0x06-0x3F
0x1B
0x1C
0x1D
0x1E
0x1F
24
0
8
0
reserved
RO
RO
23
0
7
0
V
2.50
2.45
2.40
2.35
2.30
2.25
Reserved
2.75
2.70
2.65
2.60
2.55
OUT
RO
RO
22
0
6
0
(V)
R/W
RO
21
0
5
0
OUT
R/W
RO
20
0
4
0
).
R/W
RO
19
0
3
0
VADJ
R/W
RO
18
0
2
0
October 01, 2007
R/W
RO
17
0
1
0
R/W
RO
16
0
0
0
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