LM3S600-IQN20-A0T Bookham Technology, Inc., LM3S600-IQN20-A0T Datasheet - Page 103

• Manufacturer Part Number: LM3S600-IQN20-A0T
• Description: Microcontroller
• Manufacturer: Bookham Technology, Inc.

7
7.1
7.2
7.2.1
October 01, 2007
Internal Memory
The LM3S600 microcontroller comes with 8 KB of bit-banded SRAM and 32 KB of flash memory.
The flash controller provides a user-friendly interface, making flash programming a simple task.
Flash protection can be applied to the flash memory on a 2-KB block basis.
Block Diagram
Figure 7-1. Flash Block Diagram
Functional Description
This section describes the functionality of both the flash and SRAM memories.
SRAM Memory
The internal SRAM of the Stellaris
map. To reduce the number of time consuming read-modify-write (RMW) operations, ARM has
introduced bit-banding technology in the Cortex-M3 processor. With a bit-band-enabled processor,
certain regions in the memory map (SRAM and peripheral space) can use address aliases to access
individual bits in a single, atomic operation.
The bit-band alias is calculated by using the formula:
SRAM Array
Cortex-M3
Bridge
System Bus
DCode
ICode
APB
®
devices is located at address 0x2000.0000 of the device memory
Preliminary
Flash Protection
Flash Control
Flash Timing
USECRL
FCMISC
FMPRE
FMPPE
FCRIS
FCIM
FMD
FMC
FMA
LM3S600 Microcontroller
Flash Array
103