LM3S600-IQN20-A0T Bookham Technology, Inc., LM3S600-IQN20-A0T Datasheet - Page 179
![no-image](/images/no-image-200.jpg)
LM3S600-IQN20-A0T
Manufacturer Part Number
LM3S600-IQN20-A0T
Description
Microcontroller
Manufacturer
Bookham Technology, Inc.
Datasheet
1.LM3S600-IQN20-A0T.pdf
(378 pages)
- Current page: 179 of 378
- Download datasheet (4Mb)
GPTM Raw Interrupt Status (GPTMRIS)
Timer0 base: 0x4003.0000
Timer1 base: 0x4003.1000
Timer2 base: 0x4003.2000
Offset 0x01C
Type RO, reset 0x0000.0000
October 01, 2007
Reset
Reset
Type
Type
Bit/Field
31:11
7:4
10
9
8
3
2
1
0
RO
RO
31
15
0
0
Register 6: GPTM Raw Interrupt Status (GPTMRIS), offset 0x01C
This register shows the state of the GPTM's internal interrupt signal. These bits are set whether or
not the interrupt is masked in the GPTMIMR register. Each bit can be cleared by writing a 1 to its
corresponding bit in GPTMICR.
RO
RO
30
14
0
0
TBTORIS
TATORIS
reserved
CBMRIS
reserved
CAMRIS
CBERIS
CAERIS
RTCRIS
reserved
Name
RO
RO
29
13
0
0
RO
RO
28
12
0
0
RO
RO
Type
27
11
0
0
RO
RO
RO
RO
RO
RO
RO
RO
RO
CBERIS
RO
RO
26
10
0
0
Reset
0x00
0x0
CBMRIS
0
0
0
0
0
0
0
RO
RO
25
0
9
0
Preliminary
TBTORIS
Description
Software should not rely on the value of a reserved bit. To provide
compatibility with future products, the value of a reserved bit should be
preserved across a read-modify-write operation.
GPTM CaptureB Event Raw Interrupt
This is the CaptureB Event interrupt status prior to masking.
GPTM CaptureB Match Raw Interrupt
This is the CaptureB Match interrupt status prior to masking.
GPTM TimerB Time-Out Raw Interrupt
This is the TimerB time-out interrupt status prior to masking.
Software should not rely on the value of a reserved bit. To provide
compatibility with future products, the value of a reserved bit should be
preserved across a read-modify-write operation.
GPTM RTC Raw Interrupt
This is the RTC Event interrupt status prior to masking.
GPTM CaptureA Event Raw Interrupt
This is the CaptureA Event interrupt status prior to masking.
GPTM CaptureA Match Raw Interrupt
This is the CaptureA Match interrupt status prior to masking.
GPTM TimerA Time-Out Raw Interrupt
This the TimerA time-out interrupt status prior to masking.
RO
RO
24
0
8
0
reserved
RO
RO
23
0
7
0
RO
RO
22
0
6
0
reserved
RO
RO
21
0
5
0
RO
RO
20
0
4
0
RTCRIS
LM3S600 Microcontroller
RO
RO
19
0
3
0
CAERIS
RO
RO
18
0
2
0
CAMRIS
RO
RO
17
0
1
0
TATORIS
RO
RO
16
0
0
0
179
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