LM3S600-IQN20-A0T Bookham Technology, Inc., LM3S600-IQN20-A0T Datasheet - Page 173

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LM3S600-IQN20-A0T

Manufacturer Part Number
LM3S600-IQN20-A0T
Description
Microcontroller
Manufacturer
Bookham Technology, Inc.
Datasheet
October 01, 2007
Bit/Field
1:0
TBMR
Name
Type
R/W
Reset
0x0
Preliminary
Description
GPTM TimerB Mode
The TBMR values are defined as follows:
The timer mode is based on the timer configuration defined by bits 2:0
in the GPTMCFG register.
In 16-bit timer configuration, these bits control the 16-bit timer modes
for TimerB.
In 32-bit timer configuration, this register’s contents are ignored and
GPTMTAMR is used.
Value
0x0
0x1
0x2
0x3
Description
Reserved.
One-Shot Timer mode.
Periodic Timer mode.
Capture mode.
LM3S600 Microcontroller
173

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