LM3S600-IQN20-A0T Bookham Technology, Inc., LM3S600-IQN20-A0T Datasheet - Page 175
LM3S600-IQN20-A0T
Manufacturer Part Number
LM3S600-IQN20-A0T
Description
Microcontroller
Manufacturer
Bookham Technology, Inc.
Datasheet
1.LM3S600-IQN20-A0T.pdf
(378 pages)
- Current page: 175 of 378
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October 01, 2007
Bit/Field
9
8
7
6
5
4
TBSTALL
TAPWML
reserved
RTCEN
TAOTE
Name
TBEN
Type
R/W
R/W
R/W
R/W
R/W
RO
Reset
0
0
0
0
0
0
Preliminary
Description
GPTM TimerB Stall Enable
The TBSTALL values are defined as follows:
GPTM TimerB Enable
The TBEN values are defined as follows:
Software should not rely on the value of a reserved bit. To provide
compatibility with future products, the value of a reserved bit should be
preserved across a read-modify-write operation.
GPTM TimerA PWM Output Level
The TAPWML values are defined as follows:
GPTM TimerA Output Trigger Enable
The TAOTE values are defined as follows:
GPTM RTC Enable
The RTCEN values are defined as follows:
Value
Value
Value
Value
Value
0
1
0
1
0
1
0
1
0
1
Description
TimerB stalling is disabled.
TimerB stalling is enabled.
Description
TimerB is disabled.
TimerB is enabled and begins counting or the capture logic is
enabled based on the GPTMCFG register.
Description
Output is unaffected.
Output is inverted.
Description
The output TimerA trigger is disabled.
The output TimerA trigger is enabled.
Description
RTC counting is disabled.
RTC counting is enabled.
LM3S600 Microcontroller
175
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