LM3S600-IQN20-A0T Bookham Technology, Inc., LM3S600-IQN20-A0T Datasheet - Page 3
LM3S600-IQN20-A0T
Manufacturer Part Number
LM3S600-IQN20-A0T
Description
Microcontroller
Manufacturer
Bookham Technology, Inc.
Datasheet
1.LM3S600-IQN20-A0T.pdf
(378 pages)
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Table of Contents
About This Document .................................................................................................................... 15
Audience .............................................................................................................................................. 15
About This Manual ................................................................................................................................ 15
Related Documents ............................................................................................................................... 15
Documentation Conventions .................................................................................................................. 15
1
1.1
1.2
1.3
1.4
1.4.1
1.4.2
1.4.3
1.4.4
1.4.5
1.4.6
1.4.7
1.4.8
2
2.1
2.2
2.2.1
2.2.2
2.2.3
2.2.4
2.2.5
2.2.6
3
4
5
5.1
5.2
5.2.1
5.2.2
5.2.3
5.2.4
5.3
5.4
5.4.1
5.4.2
6
6.1
6.1.1
6.1.2
October 01, 2007
Architectural Overview ...................................................................................................... 17
Product Features ...................................................................................................................... 17
Target Applications .................................................................................................................... 21
High-Level Block Diagram ......................................................................................................... 21
Functional Overview .................................................................................................................. 22
ARM Cortex™-M3 ..................................................................................................................... 23
Motor Control Peripherals .......................................................................................................... 23
Analog Peripherals .................................................................................................................... 24
Serial Communications Peripherals ............................................................................................ 24
System Peripherals ................................................................................................................... 25
Memory Peripherals .................................................................................................................. 26
Additional Features ................................................................................................................... 27
Hardware Details ...................................................................................................................... 27
ARM Cortex-M3 Processor Core ...................................................................................... 28
Block Diagram .......................................................................................................................... 29
Functional Description ............................................................................................................... 29
Serial Wire and JTAG Debug ..................................................................................................... 29
Embedded Trace Macrocell (ETM) ............................................................................................. 30
Trace Port Interface Unit (TPIU) ................................................................................................. 30
ROM Table ............................................................................................................................... 30
Memory Protection Unit (MPU) ................................................................................................... 30
Nested Vectored Interrupt Controller (NVIC) ................................................................................ 30
Memory Map ....................................................................................................................... 34
Interrupts ............................................................................................................................ 36
JTAG Interface .................................................................................................................... 38
Block Diagram .......................................................................................................................... 39
Functional Description ............................................................................................................... 39
JTAG Interface Pins .................................................................................................................. 40
JTAG TAP Controller ................................................................................................................. 41
Shift Registers .......................................................................................................................... 42
Operational Considerations ........................................................................................................ 42
Initialization and Configuration ................................................................................................... 43
Register Descriptions ................................................................................................................ 44
Instruction Register (IR) ............................................................................................................. 44
Data Registers .......................................................................................................................... 46
System Control ................................................................................................................... 48
Functional Description ............................................................................................................... 48
Device Identification .................................................................................................................. 48
Reset Control ............................................................................................................................ 48
Preliminary
LM3S600 Microcontroller
3
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