LM3S600-IQN20-A0T Bookham Technology, Inc., LM3S600-IQN20-A0T Datasheet - Page 144

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LM3S600-IQN20-A0T

Manufacturer Part Number
LM3S600-IQN20-A0T
Description
Microcontroller
Manufacturer
Bookham Technology, Inc.
Datasheet
General-Purpose Input/Outputs (GPIOs)
GPIO Digital Enable (GPIODEN)
GPIO Port A base: 0x4000.4000
GPIO Port B base: 0x4000.5000
GPIO Port C base: 0x4000.6000
GPIO Port D base: 0x4000.7000
GPIO Port E base: 0x4002.4000
Offset 0x51C
Type R/W, reset 0x0000.00FF
144
Reset
Reset
Type
Type
Bit/Field
31:8
7:0
RO
RO
31
15
0
0
Register 18: GPIO Digital Enable (GPIODEN), offset 0x51C
The GPIODEN register is the digital input enable register. By default, all GPIO signals are configured
as digital inputs at reset. If a pin is being used as a GPIO or its Alternate Hardware Function, it
should be configured as a digital input. The only time that a pin should not be configured as a digital
input is when the GPIO pin is configured to be one of the analog input signals for the analog
comparators.
RO
RO
30
14
0
0
reserved
Name
DEN
RO
RO
29
13
0
0
RO
RO
28
12
0
0
reserved
RO
RO
Type
27
11
R/W
0
0
RO
RO
RO
26
10
0
0
Reset
0xFF
0x00
RO
RO
25
0
9
0
Preliminary
Description
Software should not rely on the value of a reserved bit. To provide
compatibility with future products, the value of a reserved bit should be
preserved across a read-modify-write operation.
Digital Enable
The DEN values are defined as follows:
RO
RO
Value
24
0
8
0
reserved
0
1
Description
Digital functions disabled.
Digital functions enabled.
R/W
RO
23
0
7
1
R/W
RO
22
0
6
1
R/W
RO
21
0
5
1
R/W
RO
20
0
4
1
DEN
R/W
RO
19
0
3
1
R/W
RO
18
0
2
1
October 01, 2007
R/W
RO
17
0
1
1
R/W
RO
16
0
0
1

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