LM3S600-IQN20-A0T Bookham Technology, Inc., LM3S600-IQN20-A0T Datasheet - Page 349
LM3S600-IQN20-A0T
Manufacturer Part Number
LM3S600-IQN20-A0T
Description
Microcontroller
Manufacturer
Bookham Technology, Inc.
Datasheet
1.LM3S600-IQN20-A0T.pdf
(378 pages)
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18.1.3
18.1.4
October 01, 2007
On-Chip Low Drop-Out (LDO) Regulator Characteristics
Table 18-3. LDO Regulator Characteristics
Power Specifications
The power measurements specified in the tables that follow are run on the core processor using
SRAM with the following specifications (except as noted):
■
■
Table 18-4. Detailed Power Specifications
Parameter
V
Parameter
I
V
LDOOUT
C
DD_SLEEP
I
t
V
Temperature = 25°C
t
DD_RUN
PON
t
OFF
STEP
ON
LDO
DD
= 3.3 V
Parameter Name
Programmable internal (logic) power supply output value
Output voltage accuracy
Power-on time
Time on
Time off
Step programming incremental voltage
External filter capacitor size for internal power supply
Parameter Name
Run mode 1 (Flash loop)
Run mode 2 (Flash loop)
Run mode 1 (SRAM loop)
Run mode 2 (SRAM loop)
Sleep mode
Conditions
LDO = 2.50 V
Code = while(1){} executed in Flash
Peripherals = All clock-gated ON
System Clock = 50 MHz (with PLL)
LDO = 2.50 V
Code = while(1){} executed in Flash
Peripherals = All clock-gated OFF
System Clock = 50 MHz (with PLL)
LDO = 2.50 V
Code = while(1){} executed in SRAM
Peripherals = All clock-gated ON
System Clock = 50 MHz (with PLL)
LDO = 2.50 V
Code = while(1){} executed in SRAM
Peripherals = All clock-gated OFF
System Clock = 50 MHz (with PLL)
LDO = 2.50 V
Peripherals = All clock-gated OFF
System Clock = 50 MHz (with PLL)
Preliminary
2.25
Min
1.0
-
-
-
-
-
Nom
2%
50
-
-
-
-
Nom
95
60
85
50
19
Max
2.75
100
200
100
3.0
-
-
Max
110
Unit
75
95
60
22
mV
µs
µs
µs
µF
%
V
LM3S600 Microcontroller
Unit
mA
mA
mA
mA
mA
349
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