LM3S600-IQN20-A0T Bookham Technology, Inc., LM3S600-IQN20-A0T Datasheet - Page 329

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LM3S600-IQN20-A0T

Manufacturer Part Number
LM3S600-IQN20-A0T
Description
Microcontroller
Manufacturer
Bookham Technology, Inc.
Datasheet
14.2.1
October 01, 2007
Table 14-3. Comparator 2 Operating Modes
a. C2o and C2+ signals share a single pin and may only be used as one or the other.
Internal Reference Programming
The structure of the internal reference is shown in Figure 14-3 on page 329. This is controlled by a
single configuration register (ACREFCTL). Table 14-4 on page 329 shows the programming options
to develop specific internal reference values, to compare an external voltage against a particular
voltage generated internally.
Figure 14-3. Comparator Internal Reference Structure
VREF
Table 14-4. Internal Reference Voltage and ACREFCTL Field Values
ACCNTL2
ASRCP
00
01
10
11
ACREFCTL Register
EN Bit Value
RNG
EN
EN=0
AVDD
Comparator 2
VIN-
C2-
C2-
C2-
C2-
RNG Bit Value
VIN+
C2o/C2+
reserved
RNG=X
C0+
Vref
8R
a
Output
C2o/C2+
C2o/C2+
C2o/C2+
C2o/C2+
Output Reference Voltage Based on VREF Field Value
0 V (GND) for any value of VREF; however, it is recommended that RNG=1 and VREF=0
for the least noisy ground reference.
R
Interrupt
15
R
yes
yes
yes
yes
Preliminary
14
Decoder
R
1
R
0
8R
LM3S600 Microcontroller
internal
reference
329

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