PEF2256EV22NP Lantiq, PEF2256EV22NP Datasheet - Page 92

• Manufacturer Part Number: PEF2256EV22NP
• Manufacturer: Lantiq

Specifications of PEF2256EV22NP

• Number Of Transceivers: 1
• Screening Level: Industrial
• Mounting: Surface Mount
• Operating Temperature (min): -40C
• Operating Temperature (max): 85C
• Lead Free Status / RoHS Status: Supplier Unconfirmed

6.2.2.1
In transmit direction, contents of time slot 0 frame alignment signal of the outgoing PCM
frame are normally generated by the FALC
time slot 0 can be achieved by selecting the transparent mode XSP.TT0. With the
Transparent Service Word Mask register TSWM the S
selectively switched through transparently.
Table 20
Enabled by
–
XSP.TT0
TSWM.TSIF
TSWM.TSIS
TSWM.TRA
TSWM.TSA(8:4)
1)
2)
3)
6.2.2.2
Synchronization status is reported by bit FRS0.LFA. Framing errors are counted by the
Framing Error Counter (FEC). Asynchronous state is reached after detecting 3 or 4
consecutive incorrect FAS words or 3 or 4 consecutive incorrect service words (bit 2 = 0
in time slot 0 of every other frame not containing the frame alignment word), the selection
is done by bit RC0.ASY4. Additionally, the service word condition can be disabled. When
the framer lost its synchronization an interrupt status bit ISR2.LFA is generated.
In asynchronous state, counting of framing errors and detection of remote alarm is
stopped. AIS is automatically sent to the backplane interface (can be disabled by bit
FMR2.DAIS).
Further on the updating of the registers RSW, RSP, RSA(8:4), RSA6S and RS(16:1) is
halted (remote alarm indication, S
The resynchronization procedure starts automatically after reaching the asynchronous
state. Additionally, it can be invoked user controlled by bit FMR0.FRS (force
resynchronization, the FAS word detection is interrupted until the framer is in the
asynchronous state. After that, resynchronization starts automatically).
Synchronous state is established after detecting:
•
Data Sheet
pin XDI or XSIG or XFIFO buffer (signaling controller)
Additionally, automatic transmission of the A-bit is selectable.
As a special extension for double frame format, the S
A correct FAS word in frame n,
Transmit Transparent Modes
Synchronization Procedure
Transmit Transparent Mode (Doubleframe E1)
Transmit Transparent Source for
Framing
(int. gen.)
via pin XDI
(int. gen.)
(int. gen.)
(int. gen.)
(int. gen.)
1)
a
A-Bit
XSW.XRA
via pin XDI
XSW.XRA
XSW.XRA
via pin XDI
XSW.XRA
/S
i
-Bit access).
®
92
56. However, transparency for the complete
a
2)
-bit register can be used optionally.
S
XSW.XY0…4
3)
via pin XDI
XSW.XY0…4
XSW.XY0…4
XSW.XY0…4
via pin XDI
a
-Bits
i
-bits, A-bit and the S
Functional Description E1
S
XSW.XSIS, XSP.XSIF
via pin XDI
via pin XDI
via pin XDI
XSW.XSIS, XSP.XSIF
XSW.XSIS, XSP.XSIF
i
-Bits
Rev. 1.1, 2005-06-13
PEF 2256 H/E
a
-bits can be
FALC
®
56