PEF2256EV22NP Lantiq, PEF2256EV22NP Datasheet - Page 45

PEF2256EV22NP

Manufacturer Part Number
PEF2256EV22NP
Description
Manufacturer
Lantiq
Datasheet

Specifications of PEF2256EV22NP

Number Of Transceivers
1
Screening Level
Industrial
Mounting
Surface Mount
Operating Temperature (min)
-40C
Operating Temperature (max)
85C
Lead Free Status / RoHS Status
Supplier Unconfirmed
Table 5
Pin or
Ball No.
75 (A3)
Data Sheet
Name
RCLK
Pin Definitions - Clock Interface (cont’d)
Pin
Type
O
Buffer
Type
PU
Function
Receive Clock
After reset this port is configured to be
internally pulled up weakly. Setting of bit
PC5.CRP switches this port to be an active
output. Several output modes are provided,
selected by CMR1.RS(1:0).
CMR1.RS(1:0) = 00
Receive clock extracted from the incoming
data pulses. The clock frequency is
2.048 MHz (E1) or 1.544 MHz (T1/J1). In
case of Loss-Of-Signal (LOS) the output is
derived from the clock that is provided on
MCLK.
CMR1.RS(1:0) = 01
Receive clock extracted from the incoming
data pulses. The clock frequency is
2.048 MHz (E1) or 1.544 MHz (T1/J1). RCLK
remains high in case of LOS (as indicated by
FRS0.LOS = 1
CMR1.RS(1:0) = 10
Dejittered clock generated by the internal
DCO-R circuit. The clock frequency is
2.048 MHz (E1/T1/J1 and SIC2.SSC2 = 0
or 1.544 MHz (T1/J1 and SIC2.SSC2 = 1
CMR1.RS(1:0) = 11
Dejittered clock generated by the internal
DCO-R circuit. The clock frequency is
8.192 MHz (E1/T1/J1 and SIC2.SSC2 = 0
or 6.176 MHz (T1/J1 and SIC2.SSC2 = 1
45
B
).
B
B
B
B
:
:
:
:
Rev. 1.1, 2005-06-13
External Signals
PEF 2256 H/E
FALC
B
B
®
B
B
).
).
56
)
)

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