PEF2256EV22NP Lantiq, PEF2256EV22NP Datasheet - Page 55

• Manufacturer Part Number: PEF2256EV22NP
• Manufacturer: Lantiq

Specifications of PEF2256EV22NP

• Number Of Transceivers: 1
• Screening Level: Industrial
• Mounting: Surface Mount
• Operating Temperature (min): -40C
• Operating Temperature (max): 85C
• Lead Free Status / RoHS Status: Supplier Unconfirmed

Table 7
Pin (Ball)
No.
1 (A1)
8 (D1)
10 (E4)
10 (B9)
25 (C5)
35 (E4)
42 (H9)
59 (J3)
72 (J7)
Analog Switch
19 (H1)
20 (H2)
Device Reset
13 (F3)
JTAG Test Interface
14 (F1)
15 (G1)
16 (F2)
Data Sheet
Name
V
AS1
AS2
RES
TRS
TDI
TMS
SS
Miscellaneous Pin Definitions (cont’d)
Pin
Type
S
I/O
I/O
I
I
I
I
Buffer
Type
analog Analog Switch
analog
PU
PU
PU
Function
Ground
All analog and digital circuits are connected to
a common ground within the device package.
These pins provide the terminals for an
analog switch to be used in redundancy
applications.
Hardware Reset
During reset the FALC
clock on pin MCLK. During reset all
bidirectional output stages are in input mode,
if signal RD is “high” (which disables the data
bus D(15:0) output drivers).
0
1
Test Access Port (TAP) Reset
Initializes the boundary scan test logic. If the
boundary scan logic is not used, this pin must
be connected to RST or VSS
0
1
Test Data Input
Boundary scan input signal.
Test Mode Select
Boundary scan test mode select.
55
B
B
B
B
RES_0, device reset.
RES_1, operational mode.
TRS_0, TAP controller reset.
TRS_1, TAP operational mode.
®
56 needs an active
Rev. 1.1, 2005-06-13
External Signals
PEF 2256 H/E
FALC
®
56