PEF2256EV22NP Lantiq, PEF2256EV22NP Datasheet - Page 397

• Manufacturer Part Number: PEF2256EV22NP
• Manufacturer: Lantiq

Specifications of PEF2256EV22NP

• Number Of Transceivers: 1
• Screening Level: Industrial
• Mounting: Surface Mount
• Operating Temperature (min): -40C
• Operating Temperature (max): 85C
• Lead Free Status / RoHS Status: Supplier Unconfirmed

XPRBS
LDC(1:0)
LAC(1:0)
FLLB
LLBP
Data Sheet
Transmit Pseudo-Random Binary Sequence
A one in this bit position enables transmission of a pseudo-random
binary sequence to the remote end. Depending on bit LLBP the PRBS
is generated according to 2
Length Deactivate (Down) Code
These bits defines the length of the LLB deactivate code which is
programmable in register LCR2.
00 = Length: 5 bit
01 = Length: 6 bit, 2 bit, 3 bit
10 = Length: 7 bit
11 = Length: 8 bit, 2 bit, 4bit
Length Activate (Up) Code
These bits defines the length of the LLB activate code which is
programmable in register LCR3.
00 = Length: 5 bit
01 = Length: 6 bit, 2 bit, 3 bit
10 = Length: 7 bit
11 = Length: 8 bit, 2 bit, 4bit
Framed Line Loop-Back/Invert PRBS
Depending on bit LCR1.XPRBS this bit enables different functions:
LCR1.XPRBS = 0:
0 =
1 =
Invert PRBS
LCR1.XPRBS = 1:
0 =
1 =
Line Loop-Back Pattern
LCR1.XPRBS = 0
0 =
1 =
The line loop-back code is transmitted including framing bits.
LLB code overwrites the framing bits.
The line loop-back code is transmitted in framed mode. LLB
code does not overwrite the framing bits.
The generated PRBS is transmitted not inverted.
The PRBS is transmitted inverted.
Fixed line loop-back code according to ANSI T1. 403.
Enable user-programmable line loop-back code by register
LCR2/3.
397
15
-1 or 2
20
-1 (ITU-T O. 151).
Rev. 1.1, 2005-06-13
T1/J1 Registers
PEF 2256 H/E
FALC
®
56