PEF2256EV22NP Lantiq, PEF2256EV22NP Datasheet - Page 449

PEF2256EV22NP

Manufacturer Part Number
PEF2256EV22NP
Description
Manufacturer
Lantiq
Datasheet

Specifications of PEF2256EV22NP

Number Of Transceivers
1
Screening Level
Industrial
Mounting
Surface Mount
Operating Temperature (min)
-40C
Operating Temperature (max)
85C
Lead Free Status / RoHS Status
Supplier Unconfirmed
Receive DL-Bit Register 1 (Read)
RDL1
RDL1(7:0)
Receive DL-Bit Register 2 (Read)
RDL2
RDL2(7:0)
Data Sheet
RDL17
RDL27
7
7
Receive DL-Bit
Only valid if F12, F24 or F72 format is enabled.
The received FS/DL-Bits are shifted into this register. RDL10 is
received in frame 1 and RDL17 in frame 15, if F24 format is enabled.
RDL10 is received in frame 26 and RDL17 in frame 40, if F72 format
is enabled.
In F12 format the FS-Bits of a complete multiframe is stored in this
register. RDL10 is received in frame 2 and RDL15 in frame 12.
This register is updated with every receive multiframe begin interrupt
ISR0.RMB.
Receive DL-Bit
Only valid if F24 or F72 format is enabled.
The received DL-Bits are shifted into this register. RDL20 is received
in frame 17 and RDL23 in frame 23, if F24 format is enabled. RDL20
is received in frame 42 and RDL27 in frame 56, if F72 format is
enabled.
This register is updated with every receive multiframe begin interrupt
ISR0.RMB.
RDL16
RDL26
RDL15
RDL25
RDL14
RDL24
449
RDL13
RDL23
RDL12
RDL22
RDL11
RDL21
Rev. 1.1, 2005-06-13
T1/J1 Registers
RDL10
RDL20
PEF 2256 H/E
0
0
FALC
(5C)
(5D)
®
56

Related parts for PEF2256EV22NP