PEF2256EV22NP Lantiq, PEF2256EV22NP Datasheet - Page 328

PEF2256EV22NP

Manufacturer Part Number
PEF2256EV22NP
Description
Manufacturer
Lantiq
Datasheet

Specifications of PEF2256EV22NP

Number Of Transceivers
1
Screening Level
Industrial
Mounting
Surface Mount
Operating Temperature (min)
-40C
Operating Temperature (max)
85C
Lead Free Status / RoHS Status
Supplier Unconfirmed
Signaling Status Register (Read)
SIS
XDOV
XFW
XREP
RLI
CEC
SFS
Data Sheet
XDOV
7
Transmit Data Overflow - HDLC Channel 1
More than 32 bytes have been written to the XFIFO.
This bit is reset
– by a transmitter reset command XRES
– when all bytes in the accessible half of the XFIFO have been moved
Transmit FIFO Write Enable - HDLC Channel 1
Data can be written to the XFIFO.
Transmission Repeat - HDLC Channel 1
Status indication of CMDR.XREP.
Receive Line Inactive - HDLC Channel 1
Neither flags as interframe time fill nor frames are received through
the signaling time slot.
Command Executing - HDLC Channel 1
0 =
1 =
Note: CEC is active for about 2.5 periods of the current system data
Status Freeze Signaling
0 =
1 =
XFW
in the inaccessible half.
rate.
Freeze signaling status inactive.
Freeze signaling status active
No command is currently executed, the CMDR register can be
written to.
A command (written previously to CMDR) is currently executed,
no further command can be temporarily written in CMDR
register.
XREP
328
RLI
CEC
SFS
Rev. 1.1, 2005-06-13
PEF 2256 H/E
E1 Registers
0
FALC
(64)
®
56

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