PEF2256EV22NP Lantiq, PEF2256EV22NP Datasheet - Page 304

PEF2256EV22NP

Manufacturer Part Number
PEF2256EV22NP
Description
Manufacturer
Lantiq
Datasheet

Specifications of PEF2256EV22NP

Number Of Transceivers
1
Screening Level
Industrial
Mounting
Surface Mount
Operating Temperature (min)
-40C
Operating Temperature (max)
85C
Lead Free Status / RoHS Status
Supplier Unconfirmed
Time Slot Bit Select 3 (Read/Write)
Value after reset: FF
TSBS3
TSB3(7:0)
Time Slot Select 2 (Read/Write)
Value after reset: 00
TSS2
TSS2(4:0)
Data Sheet
TSB37
7
7
TSB36
Time Slot Selection Code - HDLC Channel 2
Defines the time slot used by HDLC channel 2.
00000 =No time slot selected
00001 =Time slot 1
...
11111 =Time slot 31
Note:Different HDLC channels must use different time slots.
Time Slot Bit Selection - HDLC Channel 3
Only bits selected by this register are used for HDLC channel 3 in
selected time slots. Time slot selection is done by setting the
appropriate bits in register TSS3. Bit selection is common to receive
and transmit direction. By default all bit positions within the selected
time slot are enabled.
0 = Bit position x in selected time slot(s) is not used for HDLC
1 = Bit position x in selected time slot(s) is used for HDLC channel
H
H
channel 3 reception and transmission.
3 reception and transmission.
TSB35
TSB34
TSS24
304
TSB33
TSS23
TSB32
TSS22
TSB31
TSS21
Rev. 1.1, 2005-06-13
PEF 2256 H/E
TSB30
TSS20
E1 Registers
0
0
FALC
(A4)
A3)
®
56

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