PEF2256EV22NP Lantiq, PEF2256EV22NP Datasheet - Page 11

PEF2256EV22NP

Manufacturer Part Number
PEF2256EV22NP
Description
Manufacturer
Lantiq
Datasheet

Specifications of PEF2256EV22NP

Number Of Transceivers
1
Screening Level
Industrial
Mounting
Surface Mount
Operating Temperature (min)
-40C
Operating Temperature (max)
85C
Lead Free Status / RoHS Status
Supplier Unconfirmed
List of Figures
Figure 1
Figure 2
Figure 3
Figure 4
Figure 5
Figure 6
Figure 7
Figure 8
Figure 9
Figure 10
Figure 11
Figure 12
Figure 13
Figure 14
Figure 15
Figure 16
Figure 17
Figure 18
Figure 19
Figure 20
Figure 21
Figure 22
Figure 23
Figure 24
Figure 25
Figure 26
Figure 27
Figure 28
Figure 29
Figure 30
Figure 31
Figure 32
Figure 33
Figure 34
Figure 35
Figure 36
Figure 37
Figure 38
Figure 39
Figure 40
Figure 41
Figure 42
Data Sheet
Bipolar Violation Detection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
GSM Base Station Aplication . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30
Logic Symbol . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31
Pin Configuration P-MQFP-80-1 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32
Pin Configuration P-LBGA-81-1 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33
Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 58
FIFO Word Access (Intel Mode) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 61
FIFO Word Access (Motorola Mode) . . . . . . . . . . . . . . . . . . . . . . . . . . 61
Interrupt Status Registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 62
Block Diagram of Test Access Port and Boundary Scan . . . . . . . . . . . 64
JTAG TAP Controller State Machine . . . . . . . . . . . . . . . . . . . . . . . . . . 66
Flexible Master Clock Unit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 67
Single Voltage Power Supply Mode. . . . . . . . . . . . . . . . . . . . . . . . . . . 68
Dual Voltage Power Supply Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . 69
Decoupling Capacitor Placement. . . . . . . . . . . . . . . . . . . . . . . . . . . . . 70
Receive Clock System (E1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 71
Receiver Configuration (E1). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 74
Receive Line Monitoring (E1). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 75
Short Haul Protection Switching Application (E1) . . . . . . . . . . . . . . . . 76
Long Haul Protection Switching Application (E1). . . . . . . . . . . . . . . . . 77
Jitter Attenuation Performance (E1). . . . . . . . . . . . . . . . . . . . . . . . . . . 80
Jitter Tolerance (E1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 81
The Receive Elastic Buffer as Circularly Organized Memory . . . . . . . 84
Automatic Handling of Errored Signaling Units . . . . . . . . . . . . . . . . . . 87
2.048 MHz Receive Signaling Highway (E1) . . . . . . . . . . . . . . . . . . . . 89
CRC4 Multiframe Alignment Recovery Algorithms (E1). . . . . . . . . . . 100
Transmitter Configuration (E1). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 106
Transmit Clock System (E1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 108
Transmit Line Monitor Configuration (E1) . . . . . . . . . . . . . . . . . . . . . 110
2.048 MHz Transmit Signaling Highway (E1) . . . . . . . . . . . . . . . . . . 112
System Interface (E1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 115
Receive System Interface Clocking (E1) . . . . . . . . . . . . . . . . . . . . . . 116
SYPR Offset Programming (2.048 Mbit/s, 2.048 MHz) . . . . . . . . . . . 118
SYPR Offset Programming (8.192 Mbit/s, 8.192 MHz) . . . . . . . . . . . 118
RFM Offset Programming (2.048 Mbit/s, 2.048 MHz) . . . . . . . . . . . . 119
RFM Offset Programming (8.192 Mbit/s, 8.192 MHz) . . . . . . . . . . . . 119
Transmit System Interface Clocking: 2.048 MHz (E1) . . . . . . . . . . . . 120
Transmit System Interface Clocking: 8.192 MHz/4.096 Mbit/s (E1). . 121
SYPX Offset Programming (2.048 Mbit/s, 2.048 MHz) . . . . . . . . . . . 123
SYPX Offset Programming (8.192 Mbit/s, 8.192 MHz) . . . . . . . . . . . 123
Remote Loop (E1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 125
Payload Loop (E1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 126
11
Rev. 1.1, 2005-06-13
PEF 2256 H/E
FALC
Page
®
56

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