PEF2256EV22NP Lantiq, PEF2256EV22NP Datasheet - Page 298

• Manufacturer Part Number: PEF2256EV22NP
• Manufacturer: Lantiq

Specifications of PEF2256EV22NP

• Number Of Transceivers: 1
• Screening Level: Industrial
• Mounting: Surface Mount
• Operating Temperature (min): -40C
• Operating Temperature (max): 85C
• Lead Free Status / RoHS Status: Supplier Unconfirmed

HDLCI2
Mode Register 3 (Read/Write)
Value after reset: 00
MODE3
MDS3(2:0)
HRAC3
DIV3
Data Sheet
MDS32
7
Inverse HDLC Operation - HDLC Channel 2
Setting this bit selects the HDLC channel 2 operation mode.
0
1
MDS31
Mode Select - HDLC Channel 3
The operating mode of the HDLC controller 3 is selected.
000 Reserved
001 Reserved
010 One-byte address comparison mode (RAL1, 2)
011 Two-byte address comparison mode (RAH1, 2 and RAL1, 2)
100 No address comparison
101 One-byte address comparison mode (RAH1, 2)
110 Reserved
111 No HDLC framing mode 1
Receiver Active - HDLC Channel 3
Switches the HDLC channel 3 receiver to operational or inoperational
state.
0
1
Data Inversion - HDLC Channel 3
Setting this bit will invert the internal generated HDLC channel 3 data
stream.
0
1
H
Normal operation, HDLC attached to line side
Inverse operation, HDLC attached to system side.
HDLC data is received on XDI and transmitted on RDO.
Receiver inactive
Receiver active
Normal operation, HDLC data stream not inverted
HDLC data stream inverted
MDS30
298
HRAC3
DIV3
HDLCI3
Rev. 1.1, 2005-06-13
PEF 2256 H/E
E1 Registers
0
FALC
(8F)
®
56