PEF2256EV22NP Lantiq, PEF2256EV22NP Datasheet - Page 64

PEF2256EV22NP

Manufacturer Part Number
PEF2256EV22NP
Description
Manufacturer
Lantiq
Datasheet

Specifications of PEF2256EV22NP

Number Of Transceivers
1
Screening Level
Industrial
Mounting
Surface Mount
Operating Temperature (min)
-40C
Operating Temperature (max)
85C
Lead Free Status / RoHS Status
Supplier Unconfirmed
5.3.2
In the FALC
of the TAP is a finite state machine (16 states) controlling the different operational modes
of the boundary scan. Both, TAP controller and boundary scan, meet the requirements
given by the JTAG standard IEEE 1149.1.
Figure 10
After switching on the device (power-on), a reset signal has to be applied to TRS, which
forces the TAP controller into test logic reset state.
For normal operation without boundary scan access, the boundary reset pin TRS can be
tied to the device reset pin RES.
If no boundary scan operation is used, TRS has to be connected to RST or V
TCK and TDI do not need to be connected since pullup transistors ensure high input
levels in this case.
Data Sheet
TDO
TMS
TRS
TCK
TDI
Boundary Scan Interface
®
56 a Test Access Port (TAP) controller is implemented. The essential part
Block Diagram of Test Access Port and Boundary Scan
TAP controller reset
clock
test
control
data in
enable
data
out
Generation
test signal generator
finite state machine
instruction register
Clock
TAP Controller
64
Figure 10
Reset
Functional Description E1/T1/J1
gives an overview.
ID data out
control
bus
BD data out
BD data in
Rev. 1.1, 2005-06-13
PEF 2256 H/E
F0115
FALC
SS
. TMS,
®
1
2
n
56

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