PEF2256EV22NP Lantiq, PEF2256EV22NP Datasheet - Page 303

PEF2256EV22NP

Manufacturer Part Number
PEF2256EV22NP
Description
Manufacturer
Lantiq
Datasheet

Specifications of PEF2256EV22NP

Number Of Transceivers
1
Screening Level
Industrial
Mounting
Surface Mount
Operating Temperature (min)
-40C
Operating Temperature (max)
85C
Lead Free Status / RoHS Status
Supplier Unconfirmed
Time Slot Bit Select 1 (Read/Write)
Value after reset: FF
TSBS1
TSB1(7:0)
Time Slot Bit Select 2 (Read/Write)
Value after reset: FF
TSBS2
TSB2(7:0)
Data Sheet
TSB17
TSB27
7
7
TSB16
TSB26
Time Slot Bit Selection - HDLC Channel 1
Only bits selected by this register are used for HDLC channel 1 in
selected time slots. Time slot selection is done by setting the
appropriate bits in registers TTR(4:1) and RTR(4:1) independently
for receive and transmit direction. Bit selection is common to receive
and transmit direction. By default all bit positions within the selected
time slot(s) are enabled.
0 = Bit position x in selected time slot(s) is not used for HDLC
1 = Bit position x in selected time slot(s) is used for HDLC channel
Time Slot Bit Selection - HDLC Channel 2
Only bits selected by this register are used for HDLC channel 2 in
selected time slots. Time slot selection is done by setting the
appropriate bits in register TSS2. Bit selection is common to receive
and transmit direction. By default all bit positions within the selected
time slot are enabled.
0 = Bit position x in selected time slot(s) is not used for HDLC
1 = Bit position x in selected time slot(s) is used for HDLC channel
H
H
channel 1 reception and transmission.
1 reception and transmission.
channel 2 reception and transmission.
2 reception and transmission.
TSB15
TSB25
TSB14
TSB24
303
TSB13
TSB23
TSB12
TSB22
TSB11
TSB21
Rev. 1.1, 2005-06-13
PEF 2256 H/E
TSB10
TSB20
E1 Registers
0
0
FALC
(A1)
(A2)
®
56

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