PEF2256EV22NP Lantiq, PEF2256EV22NP Datasheet - Page 359
PEF2256EV22NP
Manufacturer Part Number
PEF2256EV22NP
Description
Manufacturer
Lantiq
Datasheet
1.PEF2256EV22NP.pdf
(533 pages)
Specifications of PEF2256EV22NP
Number Of Transceivers
1
Screening Level
Industrial
Mounting
Surface Mount
Operating Temperature (min)
-40C
Operating Temperature (max)
85C
Lead Free Status / RoHS Status
Supplier Unconfirmed
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Mode Register (Read/Write)
Value after reset: 00
MODE
MDS(2:0)
BRAC
HRAC
DIV
1)
Data Sheet
CCR2.RADD must be set, if SS7 mode is selected
MDS2
7
Mode Select - HDLC Channel 1
The operating mode of the HDLC controller is selected.
000 Reserved
001 Signaling System 7 (SS7) support
010 One-byte address comparison mode (RAL1, 2)
011 Two-byte address comparison mode (RAH1, 2 and RAL1, 2)
100 No address comparison
101 One-byte address comparison mode (RAH1, 2)
110 Reserved
111 No HDLC framing mode 1
BOM Receiver Active - HDLC Channel 1
Switches the BOM receiver to operational or inoperational state.
0
1
Receiver Active - HDLC Channel 1
Switches the HDLC receiver to operational or inoperational state.
0
1
Data Inversion - HDLC Channel 1
Setting this bit inverts the internal generated HDLC channel 1 data
stream.
0
1
MDS1
H
Receiver inactive
Receiver active
Receiver inactive
Receiver active
Normal operation, HDLC data stream not inverted
HDLC data stream inverted
available. If SCLKX is missing, the command register is
blocked after an HDLC command is given.
MDS0
BRAC
359
HRAC
DIV
1)
HDLCI
Rev. 1.1, 2005-06-13
T1/J1 Registers
PEF 2256 H/E
0
FALC
(03)
®
56
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