PEF2256EV22NP Lantiq, PEF2256EV22NP Datasheet - Page 198

PEF2256EV22NP

Manufacturer Part Number
PEF2256EV22NP
Description
Manufacturer
Lantiq
Datasheet

Specifications of PEF2256EV22NP

Number Of Transceivers
1
Screening Level
Industrial
Mounting
Surface Mount
Operating Temperature (min)
-40C
Operating Temperature (max)
85C
Lead Free Status / RoHS Status
Supplier Unconfirmed
7.6.3
To perform an effective circuit test a line loop is implemented.
If the payload loop-back (FMR2.PLB) is activated the received 192 bits of payload data
is looped back to the transmit direction. The framing bits, CRC6 and DL-bits are not
looped, if FMR4.TM = 0. They are originated by the FALC
FMR4.TM = 1 the received FS/DL-bit is sent transparently back to the line interface.
Following pins are ignored: XDI, XSIG, TCLK, SCLKX, SYPX and XMFS. All the
received data is processed normally. With bit FMR2.SAIS an AIS can be sent to the
system interface on pin RDO.
Figure 78
Data Sheet
RL1
RL2
XL1
XL2
Payload Loop-Back
Payload Loop (T1/J1)
Clock +
Data
Recovery
Trans.
Framer
RCLK
Rec.
Framer
198
Elast.
Store
Elast.
Store
Functional Description T1/J1
AIS-GEN
®
Rev. 1.1, 2005-06-13
56 transmitter. If
MUX
PEF 2256 H/E
FALC
ITS09748
RDO
SCLKR
XDI
SCLKX
®
56

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