CY8C20X34 CYPRESS [Cypress Semiconductor], CY8C20X34 Datasheet - Page 96

• Manufacturer Part Number: CY8C20X34
• Description: Technical Reference Manual (TRM)
• Manufacturer: CYPRESS [Cypress Semiconductor]

Digital Clocks
13.2.3
The Oscillator Control Register 2 (OSC_CR2) is used to
configure various features of internal clock sources and
clock nets.
Bit 2: EXTCLKEN. When the EXTCLKEN bit is set, the
external clock becomes the source for the internal clock
tree, SYSCLK, which drives most PSoC device clocking
functions. All external and internal signals, including the low
speed oscillator, are synchronized to this clock source. The
external clock input is located on P1[4]. When using this
13.2.4
96
1,E2h
Address
“INT_CLR0 Registers” on page
“INT_MSK0 Register” on page
OSC_CR2
OSC_CR2 Register
Related Registers
Name
Bit 7
50.
49.
Bit 6
Bit 5
Bit 4
input, the pin drive mode should be set to High-Z (not High-
Z analog), such as drive mode 11b with PRT1DR bit 4 set
high.
Bit 1: IMODIS. When set, the Internal Main Oscillator (IMO)
is disabled.
For additional information, refer to the
page
190.
Bit 3
EXTCLKEN
Bit 2
PSoC CY8C20x34 TRM, Version 1.0
IMODIS
Bit 1
OSC_CR2 register on
Bit 0
Access
RW : 00