CY8C20X34 CYPRESS [Cypress Semiconductor], CY8C20X34 Datasheet - Page 31
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CY8C20X34
Manufacturer Part Number
CY8C20X34
Description
Technical Reference Manual (TRM)
Manufacturer
CYPRESS [Cypress Semiconductor]
Datasheet
1.CY8C20X34.pdf
(218 pages)
- Current page: 31 of 218
- Download datasheet (3Mb)
2.5.3
The three-byte instruction formats are the second most
prevalent instruction formats. These instructions need three
bytes because they either move data between two
addresses in the user-accessible address space (registers
and RAM) or they hold 16-bit absolute addresses as the
destination of a long jump or long call.
Table 2-5. Three-Byte Instruction Formats
The first instruction format, shown in the first row of
Table 2-5,
PSoC CY8C20x34 TRM, Version 1.0
8-Bit Opcode
8-Bit Opcode
8-Bit Opcode
Byte 0
is used by the LJMP and LCALL instructions.
Three-Byte Instructions
16-Bit Address (MSB, LSB)
8-Bit Address
8-Bit Address
Byte 1
8-Bit Data
8-Bit Address
Byte 2
These instructions change program execution uncondition-
ally to an absolute address. The instructions use an 8-bit
opcode, leaving room for a 16-bit destination address.
The second three-byte instruction format, shown in the sec-
ond row of
modes:
The third three-byte instruction format, shown in the third
row of
addressing mode, which is used by only one instruction.
This instruction format uses an 8-bit opcode followed by two
8-bit addresses. The first address is the destination address
in RAM, while the second address is the source address in
RAM. Here is an example of this instruction:
MOV [7], [5]
Destination Direct Source Immediate (ADD [7], 5)
Destination Indexed Source Immediate (ADD [X+7], 5)
Table 2-5,
Table 2-5,
is for the Destination Direct Source Direct
is used by these two addressing
CPU Core (M8C)
31
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