CY8C20X34 CYPRESS [Cypress Semiconductor], CY8C20X34 Datasheet - Page 69
CY8C20X34
Manufacturer Part Number
CY8C20X34
Description
Technical Reference Manual (TRM)
Manufacturer
CYPRESS [Cypress Semiconductor]
Datasheet
1.CY8C20X34.pdf
(218 pages)
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three times the sleep timer interval. The only way to guaran-
tee that the WDT interval is a full three times that of the
sleep interval is to clear the sleep timer (write 38h) when
clearing the WDT register. However, this is not possible in
applications that use the sleep timer as a real-time clock. In
the case where firmware clears the WDT register without
clearing the sleep timer, this can occur at any point in a
given sleep timer interval. If it occurs just before the terminal
count of a sleep timer interval, the resulting WDT interval will
be just over two times that of the sleep timer interval.
9.5
Sleep mode power consumption consists of the items in the
following tables.
In
sent maximums. These currents do not include any analog
block currents that may be on during Sleep mode.
Table 9-2. Continuous Currents
While the CLK32K can be turned off in Sleep mode, this
mode is not useful since it makes it impossible to restart
unless an imprecise power on reset (IPOR) occurs. (The
Sleep bit cannot be cleared without CLK32K.) During the
sleep mode buzz, the bandgap is on for two cycles and the
LVD circuitry is on for one cycle. Time-averaged currents
from periodic sleep mode ‘buzz’, with periodic count of N,
are listed in
Table 9-3. Time-Averaged Currents
Table 9-4
Device leakage currents add to the totals in the table.
Table 9-4. Example Currents
PSoC CY8C20x34 TRM, Version 1.0
IPOR
ICLK32K (ILO/ECO)
IBG (Bandgap)
ILVD (LVD comparators)
IPOR
CLK32K
IBG
ILVD
Total
Table
9-2, the typical block currents shown do not repre-
lists example currents for N=256 and N=1024.
Power Modes
Table
9-3.
N=256
2.9 µ A
0.46
0.4
1
1
1 µ A
1 µ A
(2/N) * 60 µ A
(2/N) * 50 µ A
N=1024
2.2 µ A
0.12
0.1
1
1
Sleep and Watchdog
69
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