CY8C20X34 CYPRESS [Cypress Semiconductor], CY8C20X34 Datasheet - Page 187
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CY8C20X34
Manufacturer Part Number
CY8C20X34
Description
Technical Reference Manual (TRM)
Manufacturer
CYPRESS [Cypress Semiconductor]
Datasheet
1.CY8C20X34.pdf
(218 pages)
- Current page: 187 of 218
- Download datasheet (3Mb)
20.4.5
This register is used to configure the Port 1 output regulator and set the interrupt mode for all GPIO.
In the table above, note that reserved bits are grayed table cells and are not described in the bit description section. Reserved
bits should always be written with a value of ‘0’. For additional information, refer to the
GPIO chapter.
Bits
1
0
PSoC CY8C20x34 TRM, Version 1.0
Individual Register Names and Addresses:
IO_CFG : 1,DCh
Access : POR
Bit Name
REG_EN
IOINT
Name
IO_CFG
Input/Output Configuration Register
7
6
Description
Controls the regulator on Port 1 outputs.
0
1
Sets the GPIO interrupt mode for all pins in the PSoC device. GPIO interrupts are also controlled at
each pin by the PRTxIE registers, and by the global GPIO bit in the INT_MSK0 register.
0
1
Regulator disabled, so Port 1 strong outputs drive to Vdd.
Regulator enabled, so Port 1 strong outputs drive to approximately 3V (for Vdd > 3V).
GPIO interrupt configured for interrupt when pin is low.
GPIO interrupt configured for interrupt when pin state changes from last time port was read.
5
4
3
Register Definitions on page 84
2
1,DCh
REG_EN
RW : 0
1
RW : 0
1,DCh
IOINT
IO_CFG
0
in the
187
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