CY8C20X34 CYPRESS [Cypress Semiconductor], CY8C20X34 Datasheet - Page 149
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CY8C20X34
Manufacturer Part Number
CY8C20X34
Description
Technical Reference Manual (TRM)
Manufacturer
CYPRESS [Cypress Semiconductor]
Datasheet
1.CY8C20X34.pdf
(218 pages)
- Current page: 149 of 218
- Download datasheet (3Mb)
20.3.10 CMP_CR0
This register is used to enable and configure the input range of the comparators.
In the table above, reserved bits are grayed table cells and are not described in the bit description section below. Reserved
bits should always be written with a value of ‘0’. For additional information, refer to the
Comparators chapter .
Bit
5
4
1
0
PSoC CY8C20x34 TRM, Version 1.0
Individual Register Names and Addresses:
CMP_CR0 : 0,7Ah
Access : POR
Bit Name
CMP1R
CMP1EN
CMP0R
CMP0EN
Name
Comparator Control Register 0
7
6
Description
0
1
0
1
0
1
0
1
Comparator 1 set to rail-to-rail input range, with approximately 20 µ A cell current.
Comparator 1 set to limited input range (Vss to Vdd - 1V), with approximately 10 µ A cell cur-
rent.
Comparartor 1 disabled, powered off.
Comparartor 1 enabled.
Comparator 0 set to rail-to-rail input range, with approximately 20 µ A cell current.
Comparator 0 set to limited input range (Vss to Vdd - 1V), with approximately 10 µ A cell cur-
rent.
Comparartor 0 disabled, powered off.
Comparartor 0 enabled.
CMP1R
RW : 0
5
CMP1EN
RW : 0
4
3
Register Definitions on page 86
2
CMP0R
RW : 0
1
0,7Ah
CMP0EN
CMP_CR0
RW : 0
0,7Ah
0
in the
149
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