CY8C20X34 CYPRESS [Cypress Semiconductor], CY8C20X34 Datasheet - Page 148
CY8C20X34
Manufacturer Part Number
CY8C20X34
Description
Technical Reference Manual (TRM)
Manufacturer
CYPRESS [Cypress Semiconductor]
Datasheet
1.CY8C20X34.pdf
(218 pages)
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CMP_MUX
20.3.9
This register contains control bits for input selection of comparators 0 and 1.
For additional information, refer to the
Bit
7:6
5:4
3:2
1:0
148
Individual Register Names and Addresses:
CMP_MUX : 0,79h
Access : POR
Bit Name
0,79h
INP1[1:0]
INN1[1:0]
INP0[1:0]
INN0[1:0]
Name
CMP_MUX
Comparator Multiplexer Register
7
INP1[1:0]
RW : 0
6
Description
00b
01b
10b
11b
Comparator 1 Negative Input Select
00b
01b
10b
11b
00b
01b
10b
11b
Comparator 0 Negative Input Select
00b
01b
10b
11b
Comparator 1 Positive Input Select
Comparator 0 Positive Input Select
Register Definitions on page 86
Analog Global Mux Bus
Reserved
P0[1] pin
P0[3] pin
VREF (1.3V)
Ref Lo (approximately 0.9V)
Ref Hi (approximately 1.8V)
Reserved
Analog Global Mux Bus
Reserved
P0[1] pin
P0[3] pin
VREF (1.3V)
Ref Lo (approximately 0.9V)
Ref Hi (approximately 1.8V)
Reserved
5
INN1[1:0]
RW : 0
4
in the Comparators chapter .
3
INP0[1:0]
RW : 0
PSoC CY8C20x34 TRM, Version 1.0
2
1
INN0[1:0]
RW : 0
0,79h
0
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