CY8C20X34 CYPRESS [Cypress Semiconductor], CY8C20X34 Datasheet - Page 60
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CY8C20X34
Manufacturer Part Number
CY8C20X34
Description
Technical Reference Manual (TRM)
Manufacturer
CYPRESS [Cypress Semiconductor]
Datasheet
1.CY8C20X34.pdf
(218 pages)
- Current page: 60 of 218
- Download datasheet (3Mb)
Internal Main Oscillator (IMO)
7.3
The following register is associated with the Internal Main Oscillator (IMO). The register description has an associated regis-
ter table showing the bit structure for that register.
7.3.1
The Internal Main Oscillator Trim Register (IMO_TR) is used
to manually center the oscillator’s output to a target fre-
quency.
The PSoC device specific value for 3.3V operation is loaded
into the IMO_TR register at boot time. The Internal Main
Oscillator will operate within specified tolerance over a volt-
age range of 2.7V to 3.6V, with no modification of this regis-
ter. If the PSoC device is operated at a lower voltage, user
code must modify the contents of this register. For operation
in the voltage range of 2.7V +/-0.3V, this is accomplished
with a TableRead command to the Supervisory ROM, which
will supply a trim value for operation in this range. For oper-
7.3.2
60
1,E8h
Address
“OSC_CR2 Register” on page
“CPU_SCR1 Register” on page
IMO_TR
Register Definitions
IMO_TR Register
Related Registers
Name
Bit 7
96.
110.
Bit 6
Bit 5
Bit 4
ation between these voltage ranges, user code can interpo-
late the best value using both available factory trim values.
It is strongly recommended that the user not alter the
register value, unless Slow IMO mode is used.
Bits 7 to 0: Trim[7:0]. These bits are used to trim the Inter-
nal Main Oscillator. A larger value in this register increases
the speed of the oscillator.
For additional information, refer to the
page
Trim[7:0]
193.
Bit 3
Bit 2
PSoC CY8C20x34 TRM, Version 1.0
Bit 1
IMO_TR register on
Bit 0
Access
W : 00
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