CY8C20X34 CYPRESS [Cypress Semiconductor], CY8C20X34 Datasheet - Page 41
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CY8C20X34
Manufacturer Part Number
CY8C20X34
Description
Technical Reference Manual (TRM)
Manufacturer
CYPRESS [Cypress Semiconductor]
Datasheet
1.CY8C20X34.pdf
(218 pages)
- Current page: 41 of 218
- Download datasheet (3Mb)
Table 4-4. SRAM Map Post SWBootReset (00h)
Address F8h is the return code byte for all SROM functions
(except Checksum and TableRead); for this function, the
only acceptable values are 00h and 02h. Address FCh is the
fail count variable. After POR (Power on Reset), WDR, or
XRES (External Reset), the variable is initialized to 00h by
the SROM. Each time the checksum fails, the fail count is
incremented. Therefore, if it takes two passes through
SWBootReset to get a good checksum, the fail count is 01h.
PSoC CY8C20x34 TRM, Version 1.0
Address
0xA_
0xB_
0xC_
0xD_
0xE_
0x0_
0x1_
0x2_
0x3_
0x4_
0x5_
0x6_
0x7_
0x8_
0x9_
0xF_
0x00
0x00
0x00
0x00
0x00
0x00
0x02
??
??
??
??
??
??
??
??
??
??
??
??
??
??
??
??
??
??
??
??
??
??
??
??
??
??
0
8
0x00
0x00
0x00
0x00
0x00
??
??
??
??
??
??
??
??
??
??
??
??
??
??
??
??
??
??
??
??
??
??
??
??
??
??
xx
1
9
0x00
0x00
0x00
0x00
0x00
0x00
??
??
??
??
??
??
??
??
??
??
??
??
??
??
??
??
??
??
??
??
??
??
??
??
??
??
A
2
0x00
0x00
0x00
0x00
0x00
??
??
??
??
??
??
??
??
??
??
??
??
??
??
??
??
??
??
??
??
??
??
??
??
??
??
??
B
3
0x00
0x00
0x00
0x00
0xn
??
??
??
??
??
??
??
??
??
??
??
??
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??
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C
4
0x00
0x00
0x00
0x00
??
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??
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??
??
??
??
??
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??
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xx
D
5
0x00
0x00
0x00
0x00
??
??
??
??
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??
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??
??
??
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??
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??
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??
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??
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??
??
E
6
0x00
0x00
0x00
0x00
??
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??
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7
F
4.1.2.2
The HWBootReset function is used to force a hardware
reset of the PSoC. A hardware rest will cause all registers to
go back to their POR state. Then, the SROM SWBootReset
function execute, followed by Flash code execution begin-
ning at address 0x0000.
The HWBootReset function only requires that the CPU_A,
KEY1, and KEY2 be setup correctly. As with all other SROM
functions, if the setup is incorrect, the SROM will execute a
HALT. Then, either a POR, XRES, or WDR will be needed to
clear the HALT. See the
page 123
Table 4-5. HWBootReset Parameters (0Fh)
4.1.2.3
The ReadBlock function is used to read 64 contiguous bytes
from Flash: a block. The CY8C20x34 PSoC device has 8
KB of Flash and therefore has 128 64-byte blocks. Valid
block IDs are 0x00 to 0x7F.
Table 4-6. Flash Memory Organization
The first thing the ReadBlock function does is check the pro-
tection bits to determine if the desired BLOCKID is readable.
If read protection is turned on, the ReadBlock function will
exit setting the accumulator and KEY2 back to 00h. KEY1
will have a value of 01h indicating a read failure.
If read protection is not enabled, the function reads 64 bytes
from the Flash using a ROMX instruction and stores the
results in SRAM using an MVI instruction. The 64 bytes are
stored in SRAM, beginning at the address indicated by the
value of the POINTER parameter. When the ReadBlock
completes successfully, the accumulator, KEY1, and KEY2
will all have a value of 00h.
Note A MVI [expr], A is used to store the Flash block con-
tents in SRAM; thus, you can the MVW_PP register to indi-
cate which SRAM pages receive the data.
KEY1
KEY2
CY8C20x34
PSoC Device
Name
for more information.
Address
0,F8h
0,F9h
HWBootReset Function
ReadBlock Function
Amount of
Flash
8 KB
Type
RAM
RAM
Amount of
512 Bytes
SRAM
3Ah
Stack Pointer value+3, when SSC is
executed.
System Resets chapter on
Supervisory ROM (SROM)
Number of
Description
per Bank
Blocks
128
Number of
Banks
1
41
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