CY8C20X34 CYPRESS [Cypress Semiconductor], CY8C20X34 Datasheet - Page 44

• Manufacturer Part Number: CY8C20X34
• Description: Technical Reference Manual (TRM)
• Manufacturer: CYPRESS [Cypress Semiconductor]

Supervisory ROM (SROM)
4.1.2.11
While the Calibrate1 function is a completely separate func-
tion from Calibrate0, they perform the same task, which is to
transfer the calibration values stored in a special area of the
Flash to their appropriate registers. What is unique about
Calibrate1 is that it calculates a checksum of the calibration
data and, if that checksum is determined as invalid,
Calibrate1 causes a hardware reset by generating an inter-
nal reset. If this occurs, it is indicated by setting the Internal
Reset Status bit (IRESS) in the CPU_SCR1 register.
The Calibrate1 function uses SRAM to calculate a check-
sum of the calibration data. The POINTER value is used to
indicate the address of a 30-byte buffer used by this func-
tion. When the function completes, the 30 bytes are set to
00h.
An MVI A, [expr] and an MVI [expr], A instruction are used to
move data between SRAM and Flash. Therefore, the MVI
write pointer (MVW_PP) and the MVI read pointer
(MVR_PP) must be specified to the same SRAM page to
control the page of RAM used for the operations.
Calibrate1 was created as a sub-function of SWBootReset
and the Calibrate1 function code was added to provide
direct access. For more information on how Calibrate1
works, see the
This function may be executed at any time to set all calibra-
tion values back to their 5V values. However, it is unneces-
sary to call this function. This function is simply documented
for completeness. This function has no argument to select
between 5V and 3.3V calibration values; therefore, it always
defaults to 5V values. 3.3V calibration values are accessed
4.2
This chapter has no register detail information because there are no registers directly assigned to the Supervisory ROM.
4.2.1
44
“STK_PP Register” on page
“MVR_PP Register” on page
“MVW_PP Register” on page
“CPU_SCR1 Register” on page
Register Definitions
Related Registers
Calibrate1 Function
“SWBootReset Function” on page
37.
37.
38.
110.
40.
by way of the TableRead function, which is described in the
section titled
Table 4-14. Calibrate1 Parameters (09h)
4.1.2.12
The WriteAndVerify function works exactly the same as the
WriteBlock function with one exception. Once the write oper-
ation has completed, the SROM will then read back the con-
tents of Flash and compare those values against the values
in SRAM thus verifying that the write was successful. The
write and verify is one SROM operation; therefore, the
SROM is not exited until the verify is completed.
The parameters for this block are identical to the WriteBlock
(see
operation fails, the 0x04 error code will be returned at SRAM
address 0xF8. If the write fails, the 0x01 error code will be
returned at SRAM address 0xF8.
Table 4-15. WriteAndVerify Parameters (02h)
KEY1
KEY2
POINTER
MVR_PP
MVW_PP
KEY1
KEY2
Name
Name
“WriteBlock Parameters (02h)” on page
Address
Address
0,F8h
0,F9h
0,FBh
0,D4h
0,D5h
0,F8h
0,F9h
“TableRead Function” on page
WriteAndVerify Function
Type
RAM
RAM
Register
Register
Type
RAM
RAM
RAM
PSoC CY8C20x34 TRM, Version 1.0
3Ah
Stack Pointer value+3, when SSC is
executed.
3Ah
Stack Pointer value+3, when SSC is
executed.
First of 30 SRAM addresses used by
this function.
MVI write page pointer
MVI read page pointer
Description
Description
43.
42). If the verify