CY8C20X34 CYPRESS [Cypress Semiconductor], CY8C20X34 Datasheet - Page 131

• Manufacturer Part Number: CY8C20X34
• Description: Technical Reference Manual (TRM)
• Manufacturer: CYPRESS [Cypress Semiconductor]

This chapter presents the Programmable Timer and its associated registers. For a complete table of the programmable timer
registers, refer to the
isters in address order, refer to the
19.1
The programmable timer is a 13-bit down counter with a ter-
minal count output. The timer has one configuration and two
data registers associated with it. It is started by setting the
START bit in its configuration register (PT_CFG). When
started, the timer always starts counting down from the
value loaded into its data registers (PT_DATA1, PT_DATA0).
The timer has a one shot mode, in which the timer com-
pletes one full count cycle and stops. In one-shot mode the
START bit in the configuration register is cleared after com-
pletion of one full count cycle. Setting the START bit will
restart the timer.
Figure 19-1. Programmable Timer Block Diagram
PSoC CY8C20x34 TRM, Version 1.0
32 kHz
Clock
19.
Architectural Description
Programmable Timer
CONFIGURATION[7:0]
Programmable
Registers
DATA[7:0]
DATA[7:0]
“Summary Table of the System Resource Registers” on page
Timer
Register Reference chapter on page
Terminal
Count
19.1.1
When started, the programmable timer loads the value con-
tained in its data registers and counts down to its terminal
count of zero. The timer outputs an active high terminal
count pulse for one clock cycle upon reaching the terminal
count. The low time of the terminal count pulse is equal to
the loaded decimal count value, multiplied by the clock
period. (TC
period of the terminal count output is the pulse width of the
terminal count, plus one clock period. (TC
CLK
period
139.
). Refer to
pw
Operation
= COUNT VALUE
90. For a quick reference of all PSoC reg-
Figure 19-2
and
decimal
Figure
* CLK
19-3.
period
period
= TC
). The
pw
131
+